Patents by Inventor Shigeaki Sakatani
Shigeaki Sakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20160029438Abstract: A seat heater that is a seat including: a planer heating element that has a plurality of electric heating wires on its upper surface and that includes a fiber layer; a cushion member that locates over a lower surface of the planer heating element; and a skin that locates above the planer heating element, wherein the planer heating element has, in voids of the fiber layer, a silica aerogel that is a silica porous body having pores with a mean pore diameter of 10 nm to 68 nm.Type: ApplicationFiled: June 4, 2014Publication date: January 28, 2016Inventors: SHIGEAKI SAKATANI, KAZUMA OIKAWA, KENTARO TAKADA, NORIO ABE, TAKAAKI HYOUDOU
-
Publication number: 20160016378Abstract: A composite sheet includes a graphite layer, a heat insulation layer including a fiber and a heat insulation material and a fiber layer located between the graphite layer and the heat insulation layer, wherein the fiber layer comprises the fiber. An electronic apparatus includes an electronic component that involves heat generation, a housing and the composite sheet, wherein the composite sheet is placed between the electronic component and the housing.Type: ApplicationFiled: June 22, 2015Publication date: January 21, 2016Inventors: KAZUMA OIKAWA, KEI TOYOTA, DAIDO KOHMYOHJI, SHIGEAKI SAKATANI
-
Publication number: 20150360961Abstract: A xerogel production method includes: adding, to water glass, a basic silicic acid solution having a sol with a particle size between a particle size of the water glass and a particle size of colloidal silica, to acidify and solate the water glass, and polycondensing the solated water glass at 20° C. to 90° C., to obtain a hydrogel; growing the hydrogel by leaving the hydrogel for a certain time period at a constant temperature; hydrophobizing the hydrogel; and drying the hydrophobized hydrogel.Type: ApplicationFiled: June 9, 2015Publication date: December 17, 2015Inventors: Kazuma Oikawa, Shigeaki Sakatani, Kei Toyota
-
Publication number: 20150077957Abstract: A composite sheet includes: a graphite layer that is disposed on a high temperature portion; an aerogel layer that is disposed on a low temperature portion; and an adhesive layer to which the graphite layer and the aerogel layer are fixed, in which the adhesive layer is formed of a water-based adhesive. The water-based adhesive layer is formed of an adhesive containing water as a solvent or an adhesive containing water as a raw material. The water-based adhesive layer includes gaps.Type: ApplicationFiled: September 4, 2014Publication date: March 19, 2015Inventors: SHIGEAKI SAKATANI, KAZUMA OIKAWA, KENTARO TAKADA, YOICHI HISATAKE, DAIDO KOHMYOHJI
-
Patent number: 8810035Abstract: A bonding structure body in which a semiconductor element and an electrode are bonded via a solder material, wherein a part that allows bonding has a first intermetallic compound layer that has been formed on the electrode side, a second intermetallic compound layer that has been formed on the semiconductor element side, and a third layer that is constituted by a phase containing Sn and a sticks-like intermetallic compound part, which is sandwiched between the two layers of the first intermetallic compound layer and the second intermetallic compound layer, and the sticks-like intermetallic compound part is interlayer-bonded to both of the first intermetallic compound layer and the second intermetallic compound layer.Type: GrantFiled: October 17, 2011Date of Patent: August 19, 2014Assignee: Panasonic CorporationInventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Yukihiro Ishimaru
-
Patent number: 8718109Abstract: A laser array light source unit 1 includes: a plurality of semiconductor lasers 2 each including a main body portion 2a and a leg portion 2b with two leading electrodes; a laser holder 3 holding the main body portions 2a, and having through-holes for the leg portions 2b; a pressing member 5 for fixing the semiconductor lasers 2 to the laser holder 3; an insulator 4 including a plurality of electrode insertion portions 4f having through-holes for the leading electrodes; and a wiring base 6 for electrically connecting at least two of the semiconductor lasers 2 in series. The insulator 4 includes a connecting portion 4b for connecting the plurality of electrode insertion portions 4f in the same direction in which the plurality of semiconductor lasers 2 are arranged. The wiring base 6 includes first through-holes into which the leading electrodes of the semiconductor lasers 2 are inserted.Type: GrantFiled: May 11, 2012Date of Patent: May 6, 2014Assignee: Panasonic CorporationInventors: Naoto Saruwatari, Shigekazu Yamagishi, Shu Nanba, Shigeaki Sakatani, Fumio Yukimoto
-
Patent number: 8691377Abstract: A semiconductor device of the present invention includes a supporting board, an electrode surface processing layer formed on the supporting board, a semiconductor element, and a solder material containing a first metal composed mainly of bismuth and a second metal having a higher melting point than the first metal and joining the electrode surface processing layer and the semiconductor element, the first metal containing particles of the second metal inside the first metal. The composition ratio of the second metal is higher than the first metal in a region of the solder material corresponding to the center portion of the semiconductor element, and the composition ratio of the second metal is at least 83.8 atomic percent in the region corresponding to the center portion.Type: GrantFiled: April 22, 2010Date of Patent: April 8, 2014Assignee: Panasonic CorporationInventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Takahiro Matsuo
-
Patent number: 8598464Abstract: A solder material includes 1.0-4.0% by weight of Ag, 4.0-6.0% by weight of In, 0.1-1.0% by weight of Bi, 1% by weight or less (excluding 0% by weight) of a sum of one or more elements selected from the group consisting of Cu, Ni, Co, Fe and Sb, and a remainder of Sn. When a copper-containing electrode part of an electronic component is connected to a copper-containing electrode land of a substrate by using this solder material, a part having an excellent stress relaxation property can be formed in the solder-connecting part and a Cu—Sn intermetallic compound can be rapidly grown from the electrode land and the electrode part to form a strong blocking structure.Type: GrantFiled: April 19, 2010Date of Patent: December 3, 2013Assignee: Panasonic CorporationInventors: Shigeaki Sakatani, Akio Furusawa, Kenichiro Suetsugu, Taichi Nakamura
-
Patent number: 8552307Abstract: A mounting structure includes an insulating substrate having a substrate electrode on which at least one electrode notch is provided and a resist, an electronic component having an electronic component electrode to be electrically connected to the substrate electrode, and solder paste printed on a surface of the substrate electrode. The substrate electrode has a following relation, 0<h (?m)?x (?m)+75 (?m), where h (?m) is a width and x (?m) is a depth of the electrode notch, and the electrode notch is formed from an end of an area, which is located under of the electronic component electrode, of the substrate electrode, or from inside of the area to a peripheral side of the substrate electrode, and the electrode notch does not reach a peripheral side, which is located under the electronic component, of the substrate electrode.Type: GrantFiled: May 18, 2011Date of Patent: October 8, 2013Assignee: Panasonic CorporationInventors: Kiyohiro Hine, Shigeaki Sakatani, Akio Furusawa
-
Publication number: 20130241069Abstract: A bonding structure body in which a semiconductor element and an electrode are bonded via a solder material, wherein a part that allows bonding has a first intermetallic compound layer that has been formed on the electrode side, a second intermetallic compound layer that has been formed on the semiconductor element side, and a third layer that is constituted by a phase containing Sn and a sticks-like intermetallic compound part, which is sandwiched between the two layers of the first intermetallic compound layer and the second intermetallic compound layer, and the sticks-like intermetallic compound part is interlayer-bonded to both of the first intermetallic compound layer and the second intermetallic compound layer.Type: ApplicationFiled: October 17, 2011Publication date: September 19, 2013Applicant: Panasonic CorporationInventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Yukihiro Ishimaru
-
Patent number: 8450859Abstract: A semiconductor device mounted structure includes a semiconductor device having a plurality of first electrodes, a circuit board having a plurality of second electrodes, a plurality of bumps respectively formed on the plurality of first electrodes, a plurality of bonding members respectively positioned between the bumps and the second electrodes to electrically connect the first electrodes to the second electrodes via the bumps, and a plurality of reinforcing resin members respectively positioned around the bonding members so as to cover at least the bonding members and bonding regions between the bonding members and the bumps. Adjacent reinforcing resin members are spaced away from each other so as not to have contact with each other without being in contact with the semiconductor device. This semiconductor device mounted structure enhances the reliability of joints in impact resistance and makes it easy to repair it.Type: GrantFiled: October 27, 2009Date of Patent: May 28, 2013Assignee: Panasonic CorporationInventors: Naomichi Ohashi, Shigeaki Sakatani, Arata Kishi, Atsushi Yamaguchi, Hidenori Miyakawa
-
Patent number: 8421246Abstract: A joint structure joins an electronic element 12 included in an electronic component to an electrode 14 included in that electronic component. The joint structure includes a solder layer, which contains 0.2 to 6% by weight of copper, 0.02 to 0.2% by weight of germanium and 93.8 to 99.78% by weight of bismuth, a nickel layer provided between the solder layer and the electrode, and a barrier layer provided between the nickel layer and the solder layer. Here, the barrier layer is formed so as to have an average thickness of from 0.5 to 4.5 ?m after the electronic element and the electrode are joined by the solder layer.Type: GrantFiled: May 22, 2009Date of Patent: April 16, 2013Assignee: Panasonic CorporationInventors: Akio Furusawa, Shigeaki Sakatani, Taichi Nakamura, Takahiro Matsuo
-
Patent number: 8410377Abstract: A plurality of semiconductor elements is adjacently mounted on a substrate by a solder with a melting point of 200° C. or lower, an electronic part other than the semiconductor elements is mounted on the substrate between the adjacently mounted semiconductor elements by a solder with a melting point of 200° C. or lower, and spaces between the plurality of semiconductor elements and the substrate, spaces between the electronic part and the substrate, and spaces between the plurality of semiconductor elements and the electronic part are integrally molded with a molding resin.Type: GrantFiled: October 29, 2008Date of Patent: April 2, 2013Assignee: Panasonic CorporationInventors: Atsushi Yamaguchi, Hidenori Miyakawa, Shigeaki Sakatani, Koso Matsuno
-
Patent number: 8378472Abstract: In order to easily inject underfill resin and perform molding with reliability, groove sections are formed on a surface of a circuit board such that the ends of the groove sections extend to semiconductor elements. Low-viscosity underfill resin applied dropwise is guided by the groove sections and flows between the circuit board and the semiconductor elements. The underfill resin hardly expands to regions outside the semiconductor elements.Type: GrantFiled: October 16, 2008Date of Patent: February 19, 2013Assignee: Panasonic CorporationInventors: Koso Matsuno, Atsushi Yamaguchi, Shigeaki Sakatani, Hidenori Miyakawa, Mikiya Ueda
-
Patent number: 8345444Abstract: A structure with electronic component mounted therein includes a wiring board on which an electronic component is mounted at least on its first face, resin provided at least between the electronic component and the wiring board, and a plurality of holes formed in the wiring board at region corresponding to a mounting position of the electronic component. The holes are filled with the resin. This suppresses warpage of the structure with electronic component mounted therein, and also improves reliability by reducing a stress applied to a bonding section between the wiring board and the electronic component.Type: GrantFiled: October 21, 2008Date of Patent: January 1, 2013Assignee: Panasonic CorporationInventors: Shigeaki Sakatani, Koso Matsuno, Atsushi Yamaguchi, Hidenori Miyakawa, Mikiya Ueda
-
Patent number: 8338966Abstract: The present invention provides a semiconductor component having a joint structure including a semiconductor device, an electrode disposed opposite the semiconductor device, and a joining material which contains Bi as main component and connects the semiconductor device to the electrode. Since the joining material contains a carbon compound, joint failure due to the difference in linear expansion coefficient between the semiconductor device and the electrode can be reduced compared with conventional materials. The joining material which contains Bi as main component enables provision of a joint structure in which a semiconductor device and an electrode are joined by a joint more reliable than a conventional joint.Type: GrantFiled: June 17, 2010Date of Patent: December 25, 2012Assignee: Panasonic CorporationInventors: Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Taichi Nakamura, Takahiro Matsuo
-
Publication number: 20120287954Abstract: A laser array light source unit 1 includes: a plurality of semiconductor lasers 2 each including a main body portion 2a and a leg portion 2b with two leading electrodes; a laser holder 3 holding the main body portions 2a, and having through-holes for the leg portions 2b; a pressing member 5 for fixing the semiconductor lasers 2 to the laser holder 3; an insulator 4 including a plurality of electrode insertion portions 4f having through-holes for the leading electrodes; and a wiring base 6 for electrically connecting at least two of the semiconductor lasers 2 in series. The insulator 4 includes a connecting portion 4b for connecting the plurality of electrode insertion portions 4f in the same direction in which the plurality of semiconductor lasers 2 are arranged. The wiring base 6 includes first through-holes into which the leading electrodes of the semiconductor lasers 2 are inserted.Type: ApplicationFiled: May 11, 2012Publication date: November 15, 2012Applicant: Panasonic CorporationInventors: Naoto SARUWATARI, Shigekazu YAMAGISHI, Shu NANBA, Shigeaki SAKATANI, Fumio YUKIMOTO
-
Patent number: 8268718Abstract: A manufacturing method for a bonded structure, in which a semiconductor device is bonded to an electrode by a bonding portion, the method including: first mounting a solder ball, in which a surface of a Bi ball is coated with Ni plating, on the electrode that is heated to a temperature equal to or more than a melting point of Bi; second pressing the solder ball against the heated electrode, cracking the Ni plating, spreading molten Bi on a surface of the heated electrode, and forming a bonding material containing Bi-based intermetallic compound of Bi and Ni; and third mounting the semiconductor device on the bonding material.Type: GrantFiled: January 17, 2011Date of Patent: September 18, 2012Assignee: Panasonic CorporationInventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Takahiro Matsuo
-
Publication number: 20120153461Abstract: A semiconductor component of the present invention includes a semiconductor element and a joining layer formed on one surface of the semiconductor element and consisting of a joining material containing Bi as an essential ingredient, and projecting sections are formed on a surface of the joining layer on a side opposite to a surface in contact with the semiconductor element. By joining the semiconductor component to an electrode arranged so as to face the joining layer, the generation of a void can be suppressed.Type: ApplicationFiled: July 20, 2010Publication date: June 21, 2012Applicant: Panasonic CorporationInventors: Hidetoshi Kitaura, Akio Furusawa, Shigeaki Sakatani, Taichi Nakamura, Takahiro Matsuo
-
Patent number: 8179686Abstract: Including a wiring board having an electronic component mounted at least on a first surface, a resin applied at least between the electronic component and the wiring board, and a through-hole provided in a region corresponding to the mounting position of the electronic component in the wiring board, a protrusion is formed on the wiring board so as to overlap at least with the electronic component, around a region corresponding to the mounting position of the electronic component.Type: GrantFiled: October 28, 2008Date of Patent: May 15, 2012Assignee: Panasonic CorporationInventors: Shigeaki Sakatani, Atsushi Yamaguchi, Koso Matsuno, Hidenori Miyakawa