Patents by Inventor Shigeaki Yoshida
Shigeaki Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6697070Abstract: A graphic processing system has a processor for managing a display area and a character font area both include within an are disposed in the address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.Type: GrantFiled: December 7, 1999Date of Patent: February 24, 2004Assignees: Renesas Technology Corporation, Hitachi Engineering Co., Ltd.Inventors: Koyo Katsura, Shigeru Matsuo, Shigeaki Yoshida, Hiroshi Takeda, Hisashi Kaziwara
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Patent number: 6538653Abstract: A graphic processing system has a processor for managing a display area and a character font area both included within an address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.Type: GrantFiled: April 1, 1996Date of Patent: March 25, 2003Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.Inventors: Koyo Katsura, Shigeru Matsuo, Shigeaki Yoshida, Hiroshi Takeda, Hisashi Kaziwara
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Patent number: 5751930Abstract: A graphic processing system for text display which includes a data processing unit, composed of a memory and a processing unit, for creating character code information, and a graphic data processing unit, composed of a graphic data processor and a frame buffer, for creating pixel information. The text display is performed by creating character code information in the data processing unit, supplying the character code information from the data processing unit to the graphic data processor, creating addresses on the frame buffer corresponding to the character code information by the graphic data processor, reading out a character font from a second area of the frame buffer using the created addresses, writing the read-out character font in a predetermined position of a first area of the frame buffer, and outputting the display data at the first area of the frame buffer to a display unit.Type: GrantFiled: March 16, 1994Date of Patent: May 12, 1998Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.Inventors: Koyo Katsura, Shigeru Matsuo, Shigeaki Yoshida, Hiroshi Takeda, Hisashi Kaziwara
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Patent number: 5610622Abstract: A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization on with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.Type: GrantFiled: September 20, 1994Date of Patent: March 11, 1997Assignee: Hitachi, Ltd.Inventors: Hiroshi Takeda, Shigeaki Yoshida, Koyo Katsura
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Patent number: 5606338Abstract: A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.Type: GrantFiled: September 20, 1994Date of Patent: February 25, 1997Assignee: Hitachi, Ltd.Inventors: Hiroshi Takeda, Shigeaki Yoshida, Koyo Katsura
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Patent number: 4947342Abstract: A graphic processing system has a processor for managing a display area and a character font area both included within an address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.Type: GrantFiled: September 9, 1986Date of Patent: August 7, 1990Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.Inventors: Koyo Katsura, Shigeru Matsuo, Shigeaki Yoshida, Hiroshi Takeda, Hisashi Kaziwara
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Patent number: 4904990Abstract: A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.Type: GrantFiled: January 15, 1988Date of Patent: February 27, 1990Assignee: Hitachi, Ltd.Inventors: Hiroshi Takeda, Shigeaki Yoshida, Koyo Katsura
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Display controller for detecting predetermined drawing command among a plurality of drawing commands
Patent number: 4747074Abstract: The display controller has a drawing processor for forming an address signal and a data signal to be supplied to a refreshing memory by processing a drawing command supplied thereto, and a digital comparator for comparing an address signal outputted from the drawing processor with an address signal set beforehand. An output of the digital comparator is utilized for referring to the drawing command to be processed. Thus the drawing command which produces a particular one of a plurality of graphic patterns forming a display on a display device can be extracted easily.Type: GrantFiled: January 27, 1987Date of Patent: May 24, 1988Inventor: Shigeaki Yoshida -
Patent number: 4720708Abstract: A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.Type: GrantFiled: December 26, 1984Date of Patent: January 19, 1988Assignee: Hitachi, Ltd.Inventors: Hiroshi Takeda, Shigeaki Yoshida, Koyo Katsura
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Patent number: 4580126Abstract: A method of testing a successive comparison type analog/digital converter which incorporates a voltage comparator, a register for successive comparison and a digital/analog converter. A reference digital signal is inputted to the incorporated digital/analog comparator to be converted into an analog signal, while a digital signal corresponding to the reference digital signal is inputted to an externally provided reference digital/analog converter to be converted into an analog signal. Both analog signals thus produced are compared with each other through the incorporated voltage comparator to thereby determine conversion accuracy. A successive comparison type analog/digital converter suited for the test includes further a change-over switch for introducing the externally supplied digital signal to the incorporated digital/analog converter and a changeover switch for leading outwardly the output signal from the voltage comparator.Type: GrantFiled: November 8, 1984Date of Patent: April 1, 1986Assignee: Hitachi, Ltd.Inventors: Kazuo Kato, Takeshi Hirayama, Shigeaki Yoshida, Yoshinori Sato
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Patent number: 4156500Abstract: A method of producing a copper clad steel wire, which comprises the steps of preparing a 5 to 15 mm diameter steel rod and a 21 to 66.7 mm width copper tape; continuously supplying the steel rod and the copper tape separately and cleaning the surfaces thereof; forming the copper tape in tubular form such that the copper tape can cover the steel rod while supplying the steel rod and the copper tape in parallel, and welding the edges of the copper tape in a non-oxidizing atmosphere; sinking the tubular copper tape sufficiently for the copper tape to substantially come into contact with the steel rod to form a copper clad steel rod; cold-drawing the copper clad steel rod and/or hot working the clad rod at a temperature of 400.degree. to 800.degree. C. to reduce its cross-sectional area by more than 20%; and then annealing the copper clad steel rod at a temperature of 300.degree. to 1050.degree. C.Type: GrantFiled: May 31, 1977Date of Patent: May 29, 1979Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shigeaki Yoshida, Susumu Ihara, Koichi Nishimune