Patents by Inventor Shigefumi Okada

Shigefumi Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456260
    Abstract: A wafer processing method for forming a modified layer within a wafer along planned dividing lines forms the modified layer within the wafer, positions a condensing point within the wafer or at a top surface of the wafer and applies a second laser beam while moving the condensing point, images reflected light, and determines a processed state of the wafer on the basis of an imaged image. The second laser beam is formed such that a sectional shape of the second laser beam in a plane perpendicular to a traveling direction of the second laser beam is not axisymmetric with respect to an axis along the planned dividing lines.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: September 27, 2022
    Assignee: DISCO CORPORATION
    Inventors: Shunsuke Teranishi, Shigefumi Okada, Shuichiro Tsukiji, Yuki Ikku
  • Publication number: 20210265279
    Abstract: A wafer processing method for forming a modified layer within a wafer along planned dividing lines forms the modified layer within the wafer, positions a condensing point within the wafer or at a top surface of the wafer and applies a second laser beam while moving the condensing point, images reflected light, and determines a processed state of the wafer on the basis of an imaged image. The second laser beam is formed such that a sectional shape of the second laser beam in a plane perpendicular to a traveling direction of the second laser beam is not axisymmetric with respect to an axis along the planned dividing lines.
    Type: Application
    Filed: February 9, 2021
    Publication date: August 26, 2021
    Inventors: Shunsuke TERANISHI, Shigefumi OKADA, Shuichiro TSUKIJI, Yuki IKKU
  • Patent number: 10211175
    Abstract: A substrate includes a plurality of semiconductor chips arranged in a grid pattern and laterally spaced from one another by channel regions. The substrate includes a vertical stack of a semiconductor layer and at least one dielectric material layer embedding metal interconnect structures. The at least one dielectric material layer are removed along the channel regions and around vertices of the grid pattern so that each semiconductor chip includes corner surfaces that are not parallel to lines of the grid pattern. The corner surfaces can include straight surfaces or convex surfaces. The semiconductor chips are diced and subsequently bonded to a packaging substrate employing an underfill material. The corner surfaces reduce mechanical stress applied to the metal interconnect layer during the bonding process and subsequent thermal cycling processes.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: February 19, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard F. Indyk, Ian D. Melville, Shigefumi Okada
  • Patent number: 9390958
    Abstract: A transfer unit transferring a wafer from or to a cassette is provided. The transfer unit includes a holding portion holding the wafer under suction and a driving portion moving the holding portion. The holding portion includes a body, a plurality of suction openings formed on the upper surface of the body so as to be spaced from each other, a vacuum transmitting passage connected to a vacuum source for transmitting a vacuum from the vacuum source to the suction openings, and a plurality of suction pads provided at the suction openings, each suction pad being formed of an elastic material. The suction openings are spaced from each other in the radial direction of the wafer, and the suction pads are selectively provided at any desired ones of the suction openings.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: July 12, 2016
    Assignee: DISCO CORPORATION
    Inventors: Kenta Onishi, Kimitake Mantoku, Shigefumi Okada, Hiroyuki Urabe, Yuki Watanabe
  • Publication number: 20160049326
    Abstract: A transfer unit transferring a wafer from or to a cassette is provided. The transfer unit includes a holding portion holding the wafer under suction and a driving portion moving the holding portion. The holding portion includes a body, a plurality of suction openings formed on the upper surface of the body so as to be spaced from each other, a vacuum transmitting passage connected to a vacuum source for transmitting a vacuum from the vacuum source to the suction openings, and a plurality of suction pads provided at the suction openings, each suction pad being formed of an elastic material. The suction openings are spaced from each other in the radial direction of the wafer, and the suction pads are selectively provided at any desired ones of the suction openings.
    Type: Application
    Filed: August 11, 2015
    Publication date: February 18, 2016
    Inventors: Kenta Onishi, Kimitake Mantoku, Shigefumi Okada, Hiroyuki Urabe, Yuki Watanabe
  • Patent number: 9034735
    Abstract: During the performance of a laser processing step of applying a laser beam to a wafer to form modified layers inside the wafer respectively along division lines, a predetermined one of the modified layers already formed is imaged by a camera from the back side of the wafer with predetermined timing, and a positional deviation of the predetermined modified layer from the corresponding division line is detected to calculate a correction value. Then, the correction value is added to data on applied position of the laser beam to thereby make the applied position of the laser beam coincide with each division line. Accordingly, a positional deviation of the modified layer to be formed after this correction from each division line can be suppressed.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: May 19, 2015
    Assignee: Disco Corporation
    Inventors: Shigefumi Okada, Nobumori Ogoshi
  • Publication number: 20150001714
    Abstract: A substrate includes a plurality of semiconductor chips arranged in a grid pattern and laterally spaced from one another by channel regions. The substrate includes a vertical stack of a semiconductor layer and at least one dielectric material layer embedding metal interconnect structures. The at least one dielectric material layer are removed along the channel regions and around vertices of the grid pattern so that each semiconductor chip includes corner surfaces that are not parallel to lines of the grid pattern. The corner surfaces can include straight surfaces or convex surfaces. The semiconductor chips are diced and subsequently bonded to a packaging substrate employing an underfill material. The corner surfaces reduce mechanical stress applied to the metal interconnect layer during the bonding process and subsequent thermal cycling processes.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 1, 2015
    Inventors: Richard F. Indyk, Ian D. Melville, Shigefumi Okada
  • Publication number: 20140151879
    Abstract: A substrate includes a plurality of semiconductor chips arranged in a grid pattern and laterally spaced from one another by channel regions. The substrate includes a vertical stack of a semiconductor layer and at least one dielectric material layer embedding metal interconnect structures. The at least one dielectric material layer are removed along the channel regions and around vertices of the grid pattern so that each semiconductor chip includes corner surfaces that are not parallel to lines of the grid pattern. The corner surfaces can include straight surfaces or convex surfaces. The semiconductor chips are diced and subsequently bonded to a packaging substrate employing an underfill material. The corner surfaces reduce mechanical stress applied to the metal interconnect layer during the bonding process and subsequent thermal cycling processes.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicants: DISCO Corporation, International Business Machines Corporation
    Inventors: Richard F. Indyk, Ian D. Melville, Shigefumi Okada
  • Publication number: 20140106545
    Abstract: During the performance of a laser processing step of applying a laser beam to a wafer to form modified layers inside the wafer respectively along division lines, a predetermined one of the modified layers already formed is imaged by a camera from the back side of the wafer with predetermined timing, and a positional deviation of the predetermined modified layer from the corresponding division line is detected to calculate a correction value. Then, the correction value is added to data on applied position of the laser beam to thereby make the applied position of the laser beam coincide with each division line. Accordingly, a positional deviation of the modified layer to be formed after this correction from each division line can be suppressed.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 17, 2014
    Applicant: Disco Corporation
    Inventors: Shigefumi Okada, Nobumori Ogoshi
  • Patent number: 8652941
    Abstract: In one embodiment, a dielectric material layer embedding metal structures is ablated from the chip-containing substrate by laser grooving, which is performed on dicing channels of the chip-containing substrate. Subsequently, an underfill layer is formed over the dielectric material layer in a pattern that excludes the peripheral areas of the chip-containing substrate. The physically exposed dicing channels at the periphery can be employed to align a blade to dice the chip-containing substrate. In another embodiment, an underfill layer is formed prior to any laser grooving. Mechanical cutting of the underfill layer from above dicing channels is followed by laser ablation of the dicing channels and subsequent mechanical cutting to dice a chip-containing substrate.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: February 18, 2014
    Assignees: International Business Machines Corporation, Disco Corporation, Sumitomo Bakelite Company Ltd.
    Inventors: Richard F. Indyk, Jae-Woong Nah, Satoru Katsurayama, Daisuke Oka, Shigefumi Okada
  • Publication number: 20130149841
    Abstract: In one embodiment, a dielectric material layer embedding metal structures is ablated from the chip-containing substrate by laser grooving, which is performed on dicing channels of the chip-containing substrate. Subsequently, an underfill layer is formed over the dielectric material layer in a pattern that excludes the peripheral areas of the chip-containing substrate. The physically exposed dicing channels at the periphery can be employed to align a blade to dice the chip-containing substrate. In another embodiment, an underfill layer is formed prior to any laser grooving. Mechanical cutting of the underfill layer from above dicing channels is followed by laser ablation of the dicing channels and subsequent mechanical cutting to dice a chip-containing substrate.
    Type: Application
    Filed: May 17, 2012
    Publication date: June 13, 2013
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, DISCO CORPORATION, SUMITOMO BAKELITE COMPANY LTD.
    Inventors: Richard F. Indyk, Jae-Woong Nah, Satoru Katsurayama, Daisuke Oka, Shigefumi Okada