Abstract: A semiconductor device includes a first terminal and a second terminal at which a signal line is attachable. A first diode is connected between the first and second terminals with an anode connected to the first terminal. A second diode and a third diode are connected in series with each other and in parallel with the first diode between the first and second terminals. The second diode has an anode connected to the second terminal, and the third diode has an anode connected to the first terminal. The third diode is a Zener diode having a capacitance that is greater than each of a capacitance of the first diode and a capacitance of the second diode. A fourth diode is optionally included in series with the first diode or in series between the second and third diodes.

Abstract: According to one embodiment, the semiconductor device according to the embodiment of the present disclosure is provided with a first semiconductor layer, a second semiconductor layer, a ninth semiconductor layer formed on the second semiconductor layer, a third semiconductor layer, a first region enclosed with the third semiconductor layer, a fourth semiconductor layer, a second region on the second semiconductor layer, a fifth semiconductor layer, a sixth semiconductor layer, a first terminal connected to the first semiconductor layer, and a second terminal connected to the fifth semiconductor layer and the sixth semiconductor layer.

Abstract: According to one embodiment, in a semiconductor device, a first semiconductor layer of a first conductivity type is formed on a semiconductor substrate of the first conductivity type. A second semiconductor layer of a second conductivity type is formed on the first semiconductor layer at a central portion except an end portion of the semiconductor substrate. A plurality of belt-shaped control electrodes is formed in parallel through a first insulating film on a surface of the second semiconductor layer. A third semiconductor layer of the first conductivity type selectively is formed on a surface of the second semiconductor layer between the control electrodes. A first electrode is formed on the control electrodes through respective second insulating films and is in contact with the third semiconductor layer. A second electrode is formed on the first semiconductor layer at the end portion of the semiconductor substrate.

Abstract: According to one embodiment, a power detector includes a reference voltage generator, a square signal generator, a detection circuit, and an output circuit. The reference voltage generator is configured to receive a bias voltage and generate a reference voltage. The square signal generator is configured to receive a voltage having a high frequency input voltage superimposed on the bias voltage and output a signal including the reference voltage, a voltage of a square of the high frequency input voltage, and a high-frequency signal. The detection circuit has a first lowpass filter, a first operational amplifier configured to amplify error between an output voltage of the first lowpass filter and the reference voltage and output the error as a control voltage, and a feedback transistor configured to feed a feedback current according to the control voltage back to an output terminal of the square signal generator.

Abstract: According to one embodiment, a power detector includes a reference voltage generator, a square signal generator, a detection circuit, and an output circuit. The reference voltage generator is configured to receive a bias voltage and generate a reference voltage. The square signal generator is configured to receive a voltage having a high frequency input voltage superimposed on the bias voltage and output a signal including the reference voltage, a voltage of a square of the high frequency input voltage, and a high-frequency signal. The detection circuit has a first lowpass filter, a first operational amplifier configured to amplify error between an output voltage of the first lowpass filter and the reference voltage and output the error as a control voltage, and a feedback transistor configured to feed a feedback current according to the control voltage back to an output terminal of the square signal generator.

Abstract: A high-gain monolithic antenna with high freedom of design has a signal circuit and a stripline dipole antenna which are provided on a substrate. A dielectric film and a conductor cover covering the dielectric film are provided on the upper surface of the substrate, in addition to a hole extending vertically downward to the underside of the substrate, a conductor wall being provided on the surface thereof. Furthermore, a metallic film is evaporated so as to contact both a metallic cover and a conductor wall. A first grounding conductor and a dielectric are provided on the lower surface of the substrate, and a second grounding conductor is provided on the upper surface of the substrate. A horn, which is tapered into the dielectric and the first grounding conductor thereby forming the shape of a quadrangular pyramid, is provided so as to overlap a hole etched into the substrate. Microwaves or milliwaves are radiated to/from the horn to/from the underside of the substrate.

Abstract: A semiconductor device has an active layer formed on a semiconductor substrate with different types of junctions, a source region, a drain region, a T-shaped gate electrode in which the cross-sectional area of the upper surface is larger than that of the lower surface, a first dielectric layer covering at least the exposed surface of the active layer, and the gate electrode, and a second dielectric layer enclosing the first dielectric layer. In the device, when the specific inductive capacities of the first and second dielectric layers are .epsilon.(1) and .epsilon.(2) respectively .epsilon.(1)<.epsilon.(2) and the water absorption ratio of the first dielectric layer is greater than the water absorption ratio of the second dielectric layer.