Abstract: A semiconductor device includes a substrate having a plurality of electrodes and a plurality of leads that are connected to the electrodes and a semiconductor element that is mounted on the substrate. The semiconductor element has a rectangular shape including a long side, a short side, and a corner portion, and has bumps connected to the electrodes. An underfill is filled between the substrate and the semiconductor element and extends on the substrate around the semiconductor element. An overcoat covers the leads on the substrate. At least one of the plurality of leads that is connected to the electrode corresponding to the bump arranged nearest to the corner portion along the long side of the semiconductor element has at least two successive bent portions that are bent in the same direction and is laid out toward the short side of the semiconductor element in a plan view.

Abstract: A semiconductor device includes a substrate having a plurality of electrodes and a plurality of leads that are connected to the electrodes and a semiconductor element that is mounted on the substrate. The semiconductor element has a rectangular shape including a long side, a short side, and a corner portion, and has bumps connected to the electrodes. An underfill is filled between the substrate and the semiconductor element and extends on the substrate around the semiconductor element. An overcoat covers the leads on the substrate. At least one of the plurality of leads that is connected to the electrode corresponding to the bump arranged nearest to the corner portion along the long side of the semiconductor element has at least two successive bent portions that are bent in the same direction and is laid out toward the short side of the semiconductor element in a plan view.

Abstract: A semiconductor device includes an insulating film base member and a wiring pattern that is formed on the insulating film base member. The wiring pattern has a surface, with at least a peripheral section of the surface being a peeled surface of the wiring pattern peeled from the insulating film base member. The semiconductor device further includes a plating layer that covers the surface of the wiring pattern, and an IC chip that has an active surface with a bump bonded to the wiring pattern. The peeled surface of the wiring pattern is peeled from the insulating film base member around a bonding position of the wiring pattern bonded with the bump.

Abstract: A semiconductor device includes an insulating film base member and a wiring pattern that is formed on the insulating film base member. The wiring pattern has a surface, with at least a peripheral section of the surface being a peeled surface of the wiring pattern peeled from the insulating film base member. The semiconductor device further includes a plating layer that covers the surface of the wiring pattern, and an IC chip that has an active surface with a bump bonded to the wiring pattern. The peeled surface of the wiring pattern is peeled from the insulating film base member around a bonding position of the wiring pattern bonded with the bump.

Abstract: A method for manufacturing a semiconductor device includes: preparing a wiring board having a base substrate and wiring that is plated on surface with a plating metal; pressing a bump that is formed on the active side of the semiconductor chip against an end part of the wiring of the wiring board, thereby exfoliating the area surrounding the pressed portion of the wiring from the base substrate while keeping the end of the wiring bonded with the base substrate; melting the plating metal that is located on the end part of the wiring, thereby causing the plating metal and the bump to form an alloy that bonds the bump and the wiring and infiltrate the plating metal into a space between the wiring and the base substrate; and judging that the bump and the wiring are well bonded if the plating metal has infiltrated a space between the wiring and the base substrate so as to have an area, width or length of infiltration that exceeds a reference value.

Abstract: A method for manufacturing a semiconductor device includes: when bonding a bump of an IC chip to a bonding position of a wiring pattern that is formed on an insulating film base member and has a surface covered by a plating layer, forming a plating layer around the bonding position among the wiring pattern at least in an outer peripheral section of a peeled surface of a portion of the wiring pattern peeled from the film base member.

Abstract: A method for manufacturing a semiconductor device includes: preparing a wiring board having a base substrate and wiring that is plated on surface with a plating metal; pressing a bump that is formed on the active side of the semiconductor chip against an end part of the wiring of the wiring board, thereby exfoliating the area surrounding the pressed portion of the wiring from the base substrate while keeping the end of the wiring bonded with the base substrate; melting the plating metal that is located on the end part of the wiring, thereby causing the plating metal and the bump to form an alloy that bonds the bump and the wiring and infiltrate the plating metal into a space between the wiring and the base substrate; and judging that the bump and the wiring are well bonded if the plating metal has infiltrated a space between the wiring and the base substrate so as to have an area, width or length of infiltration that exceeds a reference value.

Abstract: A method for manufacturing a semiconductor device includes: preparing a wiring board having a base substrate and wiring that is plated on surface with a plating metal; pressing a bump that is formed on the active side of the semiconductor chip against an end part of the wiring of the wiring board, thereby exfoliating the area surrounding the pressed portion of the wiring from the base substrate while keeping the end of the wiring bonded with the base substrate; melting the plating metal that is located on the end part of the wiring, thereby causing the plating metal and the bump to form an alloy that bonds the bump and the wiring and infiltrate the plating metal into a space between the wiring and the base substrate; and judging that the bump and the wiring are well bonded if the plating metal has infiltrated a space between the wiring and the base substrate so as to have an area, width or length of infiltration that exceeds a reference value.

Abstract: A method for manufacturing a semiconductor device, the method includes: moving a nozzle around a semiconductor chip bonded to a wiring substrate by face-down bonding; and continuously supplying underfill material through the nozzle, thereby filling the underfill material between the wiring substrate and the semiconductor chip, wherein an outline of a surface of the semiconductor chip opposing to the wiring substrate is a polygon composed of a plurality of sides, a moving track of the nozzle includes a linear track within a range of a pair of line segments drawn from both ends of each of the sides perpendicularly to said each of the sides, and a direction changing track that continuously connects adjacent ones of the linear tracks, wherein the nozzle is moved slower in at least a portion of the linear track than in the direction changing track.

Abstract: A method for manufacturing a semiconductor device includes preparing a wiring board including a base board having a first surface and a second surface, a wiring pattern having a plurality of electrical connectors and formed on the first surface, a first resist layer having a first opening for exposing the electrical connectors and partially covering the first surface and the wiring pattern, and a second resist layer having a second opening that overlaps with a region where the electrical connectors are formed and partially covering the second surface; preparing a semiconductor chip having a plurality of electrodes; and performing a bonding operation for electrically coupling the plurality of electrical connectors and the plurality of electrodes correspondingly by holding and heating the semiconductor chip with a bonding tool that has a heating mechanism and an end face whose contour is smaller than that of the second opening, aligning the bonding tool in such a way that the end face only overlaps with a regio

Abstract: A method for manufacturing a semiconductor device includes: when bonding a bump of an IC chip to a bonding position of a wiring pattern that is formed on an insulating film base member and has a surface covered by a plating layer, forming a plating layer around the bonding position among the wiring pattern at least in an outer peripheral section of a peeled surface of a portion of the wiring pattern peeled from the film base member.

Abstract: A method for manufacturing a semiconductor device includes: preparing a wiring board having a base substrate and wiring that is plated on surface with a plating metal; pressing a bump that is formed on the active side of the semiconductor chip against an end part of the wiring of the wiring board, thereby exfoliating the area surrounding the pressed portion of the wiring from the base substrate while keeping the end of the wiring bonded with the base substrate; melting the plating metal that is located on the end part of the wiring, thereby causing the plating metal and the bump to form an alloy that bonds the bump and the wiring and infiltrate the plating metal into a space between the wiring and the base substrate; and judging that the bump and the wiring are well bonded if the plating metal has infiltrated a space between the wiring and the base substrate so as to have an area, width or length of infiltration that exceeds a reference value.

Abstract: A method for manufacturing a semiconductor device, the method includes: moving a nozzle around a semiconductor chip bonded to a wiring substrate by face-down bonding; and continuously supplying underfill material through the nozzle, thereby filling the underfill material between the wiring substrate and the semiconductor chip, wherein an outline of a surface of the semiconductor chip opposing to the wiring substrate is a polygon composed of a plurality of sides, a moving track of the nozzle includes a linear track within a range of a pair of line segments drawn from both ends of each of the sides perpendicularly to said each of the sides, and a direction changing track that continuously connects adjacent ones of the linear tracks, wherein the nozzle is moved slower in at least a portion of the linear track than in the direction changing track.

Abstract: A method for manufacturing a semiconductor device includes preparing a wiring board including a base board having a first surface and a second surface, a wiring pattern having a plurality of electrical connectors and formed on the first surface, a first resist layer having a first opening for exposing the electrical connectors and partially covering the first surface and the wiring pattern, and a second resist layer having a second opening that overlaps with a region where the electrical connectors are formed and partially covering the second surface; preparing a semiconductor chip having a plurality of electrodes; and performing a bonding operation for electrically coupling the plurality of electrical connectors and the plurality of electrodes correspondingly by holding and heating the semiconductor chip with a bonding tool that has a heating mechanism and an end face whose contour is smaller than that of the second opening, aligning the bonding tool in such a way that the end face only overlaps with a regio

Abstract: A method for manufacturing semiconductor devices, comprises: mounting a substrate on a bonding stage; pressing the substrate to the bonding stage by blowing a compressed air from the upper face side of the substrate; causing the bonding stage to adsorb the substrate by exhausting air from the lower face side of the substrate, and bonding a semiconductor chip to the substrate.