Patents by Inventor Shigeki Kamimura
Shigeki Kamimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8189112Abstract: An embodiment has a C separating circuit which separates a carriage color signal and which outputs a reference, a lead, and a delayed composite video signals, a filter that extracts a high-frequency carriage color component with a significant variation in hue from the carriage color signal, a first calculation circuit which outputs a first luminance signal, a second calculation circuit which subtracts the carriage color signal from each of the reference, the preceding lead, and the delayed composite video signals and which derives a second luminance signal having an intermediate value, and a selection circuit which outputs the second luminance signal when the high-frequency carriage color component has a value larger than the reference value and which derives the first luminance signal when the high-frequency carriage color component has a value smaller than the reference value.Type: GrantFiled: April 24, 2007Date of Patent: May 29, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Shigeki Kamimura, Yuichi Honda
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Patent number: 8164692Abstract: According to one embodiment, a gamma correction circuit including a serial storage unit which serially stores first and second parameter information in a storage area, a first parallel storage unit which parallelly stores the first parameter information in the storage area, a second parallel storage unit, a gamma correction unit which receives a video signal and which performs gamma correction to the video signal based on the first or second parameter information, and a control unit which serially reads the first or second parameter information, parallelly stores the information in the first or second parallel storage units, parallelly reads the first or second parameter information, supplies the information to the gamma correction unit, and performs gamma correction to the video signal based on the first or second parameter information.Type: GrantFiled: January 17, 2008Date of Patent: April 24, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Kamimura
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Patent number: 7808473Abstract: According to one embodiment, a display apparatus having a display, a signal-processing unit, a luminance-curve converter, a histogram-extracting unit, a characteristic-control-data output unit, an integrator, and a multiplier. The signal-processing unit processes a video signal. The converter converts the input/output characteristic of the luminance level of the video signal. The histogram-extracting unit generates histogram distribution data for a luminance level of a video signal. The characteristic-control-data output unit sets a characteristic to the luminance-curve converter so that the converter emphasizes a low-luminance region of the image represented by the input video signal. The integrator integrates data items pertaining to the region emphasized by the converter, thereby generating an integrated value. From the output of the integrator, the multiplier generates an output that lowers the light-adjusting voltage applied to the display device.Type: GrantFiled: May 25, 2006Date of Patent: October 5, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Kamimura
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Patent number: 7738042Abstract: A noise reduction device for generating a delay frame by delaying an input frame in each frame, a first difference value between the delay frame and the input frame, a line delay frame by delaying the input frame in each line, and a second line delay frame by delaying the delay frame in each line. The device generates a second difference value between the input frame and the line delay frame, a third difference value between the delay frame and the second line delay frame, a fourth difference value between the line delay frame and the second line delay frame. The device corrects the input frame by using the first difference value based on a logical sum (or product) of the third difference value and the fourth difference value, and the delay frame based on a logical sum (or product) of the second difference value and the fourth difference value.Type: GrantFiled: November 18, 2008Date of Patent: June 15, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Kamimura
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Patent number: 7697065Abstract: According to one embodiment, an embodiment of a pixel conversion device of the invention improves outlines of edge peripheries of characters, etc., of a color digital image signal. The device includes a histogram extraction module, a picture characteristic extraction module which detects a luminance boundary in a luminance signal block on the basis of histogram information, sets a color-difference boundary of the same pattern as that of the luminance boundary to a virtual color-difference signal block, and generates a control signal for unifying the same area by pixel data of the same value, and a data rate conversion module which converts a color-difference signal block before conversion into the same data rate as that of the luminance signal block to correlate the converted color-difference signal block to the virtual color-difference signal block, corrects resolution and obtains a color-difference signal for a format of 4:4:4.Type: GrantFiled: November 18, 2008Date of Patent: April 13, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Kamimura
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Publication number: 20090244366Abstract: According to one embodiment, an embodiment of a pixel conversion device of the invention improves outlines of edge peripheries of characters, etc., of a color digital image signal. The device includes a histogram extraction module, a picture characteristic extraction module which detects a luminance boundary in a luminance signal block on the basis of histogram information, sets a color-difference boundary of the same pattern as that of the luminance boundary to a virtual color-difference signal block, and generates a control signal for unifying the same area by pixel data of the same value, and a data rate conversion module which converts a color-difference signal block before conversion into the same data rate as that of the luminance signal block to correlate the converted color-difference signal block to the virtual color-difference signal block, corrects resolution and obtains a color-difference signal for a format of 4:4:4.Type: ApplicationFiled: November 18, 2008Publication date: October 1, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shigeki Kamimura
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Patent number: 7580024Abstract: According to one embodiment, a display apparatus including a receiving unit, two signal processing units and, a luminance-curve converter, a display device, a histogram-extracting unit, and a characteristic-control-data output unit. The unit sets a characteristic to the luminance-curve converter in accordance with histogram distribution data. The display apparatus further comprises a first control-signal generating unit, a second control-signal generating unit and a selector. The unit generates a first control signal that reduces amount of light emitted from the backlight to a value corresponding to the value obtained by integrating the data for emphasizing the low-region, in the luminance-curve converter. The unit determines darkness of the image from the histogram distribution data and generates a second control signal that reduces amount of light in accordance with the darkness of the image.Type: GrantFiled: June 27, 2006Date of Patent: August 25, 2009Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Kamimura
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Publication number: 20090167952Abstract: A frame delay module to generate a delay frame by delaying an input frame of a video signal in each frame; a first difference generate module to generate a first difference value between the delay frame and the input frame; a first line delay module to generate a line delay frame by delaying the input frame in each line; a second line delay module to generate a second line delay frame by delaying the delay frame in each line; a second difference generate module to generate a second difference value between the input frame and the line delay frame; a third difference generate module to generate a third difference value between the delay frame and the second line delay frame; a fourth difference generate module to generate a fourth difference value between the line delay frame and the second line delay frame; a first correction module to correct the input frame by using the first difference value based on a logical sum or a logical product of the third difference value and the fourth difference value; and a secType: ApplicationFiled: November 18, 2008Publication date: July 2, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shigeki Kamimura
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Patent number: 7492380Abstract: An apparatus for processing a video signal comprises receiving units for receiving video signals, filter units for repeating filtering processing in two or more times of generating a new pixel at a position at which adjacent pixels of the received video signal are mutually weighted by a ratio of roughly 3:1 and generating a new pixel at a position at which precedingly generated adjacent pixels are mutually weighted by a ratio of roughly 3:1, and selection units for respectively selecting a pixel to be extracted among pixels to be performed filtering processing in two or more times on the basis of a scaling ratio to discriminate a position of a pixel to be output.Type: GrantFiled: June 21, 2005Date of Patent: February 17, 2009Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Kamimura
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Publication number: 20080180577Abstract: According to one embodiment, a gamma correction circuit including a serial storage unit which serially stores first and second parameter information in a storage area, a first parallel storage unit which parallelly stores the first parameter information in the storage area, a second parallel storage unit, a gamma correction unit which receives a video signal and which performs gamma correction to the video signal based on the first or second parameter information, and a control unit which serially reads the first or second parameter information, parallelly stores the information in the first or second parallel storage units, parallelly reads the first or second parameter information, supplies the information to the gamma correction unit, and performs gamma correction to the video signal based on the first or second parameter information.Type: ApplicationFiled: January 17, 2008Publication date: July 31, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shigeki Kamimura
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Publication number: 20080043151Abstract: An embodiment has a C separating circuit which separates a carriage color signal and which outputs a reference, a lead, and a delayed composite video signals, a filter that extracts a high-frequency carriage color component with a significant variation in hue from the carriage color signal, a first calculation circuit which outputs a first luminance signal, a second calculation circuit which subtracts the carriage color signal from each of the reference, the preceding lead, and the delayed composite video signals and which derives a second luminance signal having an intermediate value, and a selection circuit which outputs the second luminance signal when the high-frequency carriage color component has a value larger than the reference value and which derives the first luminance signal when the high-frequency carriage color component has a value smaller than the reference value.Type: ApplicationFiled: April 24, 2007Publication date: February 21, 2008Inventors: Shigeki Kamimura, Yuichi Honda
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Publication number: 20070252914Abstract: According to one embodiment, a Y/C separation apparatus executes a Y/C separation based on a difference between frames of a composite video signal. The Y/C separation apparatus includes: a motion detection unit that specifies a motion amount based on an amount of a two-frame difference or one-frame difference at each of target pixels; and a determination unit that determines if an image is still based on a motion detection result of the motion detection unit. The motion detection unit detects differences for pixels adjacent to the target pixels.Type: ApplicationFiled: April 26, 2007Publication date: November 1, 2007Applicant: KABUSHKI KAISHA TOSHIBAInventors: Shigeki Kamimura, Yuichi Honda
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Patent number: 7265695Abstract: A video signal processing apparatus comprises an A/D converter for digitizing an analog video signal, an integration circuit for integrating the digitized video signal within a predetermined integration range, a picture display device for displaying a picture based on an integration output, and a control unit which, when an offset adjustment signal is inputted to the A/D converter, corrects the offset value so as to eliminate a difference between the integration value of the integration circuit and a preliminarily set specified value, and determines whether or not offset adjustment is completed based on the number of times when the corrected offset value is within a range defined by adding a predetermined error to the specified value.Type: GrantFiled: June 10, 2005Date of Patent: September 4, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Shigeki Kamimura, Tadashi Oguma
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Publication number: 20070024573Abstract: According to one embodiment, a display apparatus including a receiving unit, two signal processing units and, a luminance-curve converter, a display device, a histogram-extracting unit, and a characteristic-control-data output unit. The unit sets a characteristic to the luminance-curve converter in accordance with histogram distribution data. The display apparatus further comprises a first control-signal generating unit, a second control-signal generating unit and a selector. The unit generates a first control signal that reduces amount of light emitted from the backlight to a value corresponding to the value obtained by integrating the data for emphasizing the low-region, in the luminance-curve converter. The unit determines darkness of the image from the histogram distribution data and generates a second control signal that reduces amount of light in accordance with the darkness of the image.Type: ApplicationFiled: June 27, 2006Publication date: February 1, 2007Inventor: Shigeki KAMIMURA
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Publication number: 20070024572Abstract: A display apparatus comprising a receiving unit, a signal-processing unit, and a display device. Histogram distribution data is generated for a luminance level of a video signal output from the signal-processing unit. The apparatus further has a first multiplier, a second multiplier, and a differentiator. The first multiplier multiplies the histogram distribution data by multiplying values, where the higher the luminance level of each part of the histogram data is. The multiplier multiplies the histogram distribution data by multiplying values, where the lower the luminance level of each part of the histogram data is. The differentiator finds a difference between outputs of the first and second multipliers, generating control data that lowers a luminance-adjusting voltage of the display device in accordance with the magnitude ratio of the output from the first multiplier to the output of the second multiplier.Type: ApplicationFiled: June 1, 2006Publication date: February 1, 2007Inventor: Shigeki Kamimura
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Publication number: 20070024582Abstract: According to one embodiment, a display apparatus having a display, a signal-processing unit, a luminance-curve converter, a histogram-extracting unit, a characteristic-control-data output unit, an integrator, and a multiplier. The signal-processing unit processes a video signal. The converter converts the input/output characteristic of the luminance level of the video signal. The histogram-extracting unit generates histogram distribution data for a luminance level of a video signal. The characteristic-control-data output unit sets a characteristic to the luminance-curve converter so that the converter emphasizes a low-luminance region of the image represented by the input video signal. The integrator integrates data items pertaining to the region emphasized by the converter, thereby generating an integrated value. From the output of the integrator, the multiplier generates an output that lowers the light-adjusting voltage applied to the display device.Type: ApplicationFiled: May 25, 2006Publication date: February 1, 2007Inventor: Shigeki Kamimura
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Publication number: 20060001774Abstract: An apparatus for processing a video signal comprises receiving units for receiving video signals, filter units for repeating filtering processing in two or more times of generating a new pixel at a position at which adjacent pixels of the received video signal are mutually weighted by a ratio of roughly 3:1 and generating a new pixel at a position at which precedingly generated adjacent pixels are mutually weighted by a ratio of roughly 3:1, and selection units for respectively selecting a pixel to be extracted among pixels to be performed filtering processing in two or more times on the basis of a scaling ratio to discriminate a position of a pixel to be output.Type: ApplicationFiled: June 21, 2005Publication date: January 5, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shigeki Kamimura
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Publication number: 20050280642Abstract: A video signal processing apparatus comprises an A/D converter for digitizing an analog video signal, an integration circuit for integrating the digitized video signal within a predetermined integration range, a picture display device for displaying a picture based on an integration output, and a control unit which, when an offset adjustment signal is inputted to the A/D converter, corrects the offset value so as to eliminate a difference between the integration value of the integration circuit and a preliminarily set specified value, and determines whether or not offset adjustment is completed based on the number of times when the corrected offset value is within a range defined by adding a predetermined error to the specified value.Type: ApplicationFiled: June 10, 2005Publication date: December 22, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shigeki Kamimura, Tadashi Oguma
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Publication number: 20040141092Abstract: First and second line memories alternately store input video signals for every scanning line. The video signals stored in the line memories are read by a predetermined number of times in accordance with a signal system of the input video signals. A calculator calculates average values among the video signals read from the line memories. A selector circuit sequentially selects the video signals read from the first and second line memories when the input video signals are based on an interlace system, and sequentially selects the video signals read from the first and second line memories and the averaged video signals when the input video signals are based on a progressive scan system. The selected signals are supplied to a liquid crystal display apparatus.Type: ApplicationFiled: November 21, 2003Publication date: July 22, 2004Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shigeki Kamimura
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Patent number: 5719636Abstract: The DC level of the low-frequency component of a horizontal frequency is detected from a video signal by a horizontal LPF 16d and a DC value detection circuit 16g. In addition, the high-frequency component of the horizontal frequency is detected from the video signal by a horizontal BPF 16e and a nonlinear circuit 16h. Furthermore, a high-frequency component in the vertical direction is detected from the video signal by a vertical BPF 16f and a nonlinear circuit 16i. On the basis of three detection results, the presence/absence of a non-image portion of the video signal is determined by a determination circuit 16j.Type: GrantFiled: December 28, 1995Date of Patent: February 17, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Satoyuki Ishii, Tsutomu Fujishima, Shigeki Kamimura