Patents by Inventor Shigeki Katsumi

Shigeki Katsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7356742
    Abstract: A memory test system can screen objects of tests accurately at low cost in quasi-operating conditions by utilizing a personal computer (PC). The system utilizes a PC tester comprising a measurement PC unit that carries a memory module to be used as reference; a signal distribution unit for distributing the signal taken out form the measurement PC unit; a plurality of performance boards (PFBs) mounted with respective objected products to be observed simultaneously by using the signals distributed by the signal distribution unit; a display panel for displaying the current status of the test that is being conducted; a power source for producing the operating voltage of the system; and a control PC for controlling the selection of test parameters and various analytical operations.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: April 8, 2008
    Assignees: Renesas Technology Corp., Hitachi High-Technologies Corporation
    Inventors: Hideyuki Aoki, Takeshi Wada, Masaaki Namba, Noboru Uchida, Shigeki Katsumi, Yuji Wada, Masaaki Mochiduki
  • Publication number: 20050193274
    Abstract: A memory test system can screen objects of tests accurately at low cost in quasi-operating conditions by utilizing a personal computer. The system utilizes a PC tester comprising a measurement PC unit that carries a memory module to be used as reference; a signal distribution unit for distributing the signal taken out from the measurement PC unit; a plurality of PFBs mounted with respective objected products to be observed simultaneously by using the signals distributed by the signal distribution unit; a display panel for displaying the current status of the test that is being conducted; a power source for producing the operating voltage of the system; and a control PC for controlling the selection of test parameters and various analytical operations. The PC tester is adapted to take out the signal from the chip set LSI on the PC mother board in the measurement PC unit to the individual memories on the memory module or the memory module per se and test them in quasi-operating conditions.
    Type: Application
    Filed: April 18, 2005
    Publication date: September 1, 2005
    Inventors: Hideyuki Aoki, Takeshi Wada, Masaaki Namba, Noboru Uchida, Shigeki Katsumi, Yuji Wada, Masaaki Mochiduki
  • Publication number: 20020046374
    Abstract: A memory test system can screen objects of tests accurately at low cost in quasi-operating conditions by utilizing a personal computer. The system utilizes a PC tester comprising a measurement PC unit that carries a memory module to be used as reference; a signal distribution unit for distributing the signal taken out from the measurement PC unit; a plurality of PFBs mounted with respective objected products to be observed simultaneously by using the signals distributed by the signal distribution unit; a display panel for displaying the current status of the test that is being conducted; a power source for producing the operating voltage of the system; and a control PC for controlling the selection of test parameters and various analytical operations. The PC tester is adapted to take out the signal from the chip set LSI on the PC mother board in the measurement PC unit to the individual memories on the memory module or the memory module per se and test them in quasi-operating conditions.
    Type: Application
    Filed: December 15, 2000
    Publication date: April 18, 2002
    Inventors: Hideyuki Aoki, Takeshi Wada, Masaaki Namba, Noboru Uchida, Shigeki Katsumi, Yuji Wada, Masaaki Mochiduki