Abstract: The objective of the invention is to provide a type of semiconductor memory device whose antifuse can be formed without any additional film manufacturing process. A first electrode is formed by a first polysilicon film 37 formed on semiconductor substrate 30 and a second polysilicon film 39 deposited on the surface of the first polysilicon film. The first electrode, a dielectric film formed on the surface of the first electrode, and a second electrode form capacitor 11 in the memory cell. An antifuse 12 with the same configuration as capacitor 11 is formed in the semiconductor memory device. Because there is no need to use an additional film, the manufacturing cost is low, and antifuse 12 can be easily arranged. It is also possible to form antifuse 13 by forming instead of depositing the second polysilicon film 39 on the surface of the first polysilicon film 39.

Abstract: A spatial light modulator (10) of the DMD type having an array of memory cells (16) controlling an array of pixels (12). The memory cell array (16) has several integral, interleaved spare rows of memory cells MR (R1), MR (R2), and MR (R3), which can be selectively utilized to replace a defective row of primary memory cells. A fused row address mapping logic circuit (40) includes a network of fuses (F0-F12) and controls the implementation of memory cells, as well as the mapping of address signals to the memory cells as a function of inputs (R0-R11) received from a row decoder circuit (20). This circuit (40) is transparent to the row address decoder circuit (20). The present invention is suitable for large spatial light modulators compatible with high definition television (HDTV). High yield devices can be obtained with the present invention.

Abstract: A semiconductor memory device having reserve bit lines or word lines for replacing defective bit lines or word lines which can increase a defect relief probability and improve an operational margin. The reserve bit lines or word lines are provided approximately in a central portion of a memory mat. Because of a low probability of defect occurrence in the reserve word lines or bit lines, the probability of defect occurrence can be made low when a defective word line or bit line is replaced with a reserve word line or bit line.

Abstract: A word line driving circuit which effectively prevents ground noise during word line discharge along with accommodating the narrowing of pitch in the word lines by making the layout area of the word line driver small. The word line driving circuit includes n-type MOS transistor 14 and p-type MOS transistor 12. The drain terminal of n-type MOS transistor 14 and drain terminal of p-type MOS transistor 12 in word line driver 10 are connected to the base terminal of word line WLi. The output terminal of an output transistor driving circuit 16 is connected to the source terminal of p-type MOS transistor 12, and the output terminal of a first output transistor controlling circuit 18 is connected to the gate terminal. The output terminal of a second output transistor controlling circuit 20 is connected to the gate terminal of n-type MOS transistor 14, and a ground terminal 22 as a reference potential terminal for leading in the electric current is connected to the source terminal.