Patents by Inventor Shigeki Tomisato

Shigeki Tomisato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7956652
    Abstract: A semiconductor integrated circuit has a sampling circuit which samples a potential of an input terminal, a dynamic comparator having a standby and a comparison mode which compares the potential of the input terminal and a reference potential, a switch for input signals connected between the input terminal and the dynamic comparator, a capacitor for comparator having one end connected between the switch for input signals and the dynamic comparator and another end connected to a fixed potential, and a timing control circuit which controls a timing to sample by sampling circuit, a timing to switch modes of dynamic comparator, and a timing to make switch for input signals conducting or blocking state. The timing control circuit makes the switch for input signals blocking state from conducting state before the dynamic comparator switches from standby mode to comparison mode, and terminates sampling by sampling circuit after switching modes.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Shigeki Tomisato
  • Publication number: 20090237119
    Abstract: A semiconductor integrated circuit has a sampling circuit which samples a potential of an input terminal, a dynamic comparator having a standby and a comparison mode which compares the potential of the input terminal and a reference potential, a switch for input signals connected between the input terminal and the dynamic comparator, a capacitor for comparator having one end connected between the switch for input signals and the dynamic comparator and another end connected to a fixed potential, and a timing control circuit which controls a timing to sample by sampling circuit, a timing to switch modes of dynamic comparator, and a timing to make switch for input signals conducting or blocking state. The timing control circuit makes the switch for input signals blocking state from conducting state before the dynamic comparator switches from standby mode to comparison mode, and terminates sampling by sampling circuit after switching modes.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 24, 2009
    Inventor: Shigeki Tomisato