Abstract: The semiconductor device of the present invention includes: a MOSFET having a gate electrode formed via a gate insulating film over a semiconductor layer and source and drain regions formed in the semiconductor layer on both sides of the gate electrode; and a diode. The diode has an n+-type semiconductor region, a p-type semiconductor region and a p+-type semiconductor region. Then, the gate electrode is connected to the n+-type semiconductor region via an n-type semiconductor region formed so as to be connected to the n+-type semiconductor region. Also, the p+-type semiconductor region is connected to a semiconductor layer below the gate electrode. In this way, by providing the diode between the back gate and gate electrode of the MOSFET, breakage of the gate insulating film can be prevented.

Abstract: The semiconductor device of the present invention includes: a MOSFET having a gate electrode formed via a gate insulating film over a semiconductor layer and source and drain regions formed in the semiconductor layer on both sides of the gate electrode; and a diode. The diode has an n+-type semiconductor region, a p-type semiconductor region and a p+-type semiconductor region. Then, the gate electrode is connected to the n+-type semiconductor region via an n-type semiconductor region formed so as to be connected to the n+-type semiconductor region. Also, the p+-type semiconductor region is connected to a semiconductor layer below the gate electrode. In this way, by providing the diode between the back gate and gate electrode of the MOSFET, breakage of the gate insulating film can be prevented.

Abstract: The semiconductor device comprises: a semiconductor substrate (N+ substrate 110) containing a first conductivity type impurity implanted therein; a second conductivity type impurity-implanted layer (P+ implanted layer 114) at relatively high concentration, formed on the semiconductor substrate (N+ substrate 110); a second conductivity type impurity epitaxial layer (P? epitaxial layer 111) at relatively low concentration, formed on the second conductivity type impurity-implanted layer (P+ implanted layer 114); and a field effect transistor 100 (N-channel type lateral MOSFET 100) composed of a pair of impurity diffusion regions (N+ source diffusion layer 115 and N? drain layer 116) provided in the second conductivity type impurity epitaxial layer (P? epitaxial layer 111) and a gate electrode 117 provided over a region sandwiched with the pair of impurity diffusion regions (N+ source diffusion layer 115 and N? drain layer 116).

Abstract: A field effect transistor includes a source electrode (30) and a drain electrode (29) formed to be spaced apart from each other on a semiconductor substrate (2), a gate electrode (22) disposed between the source electrode (30) and the drain electrode (29), and a field plate electrode (24, 26) disposed via an insulating film (21) above the semiconductor substrate (2) in a region between the gate electrode (22) and the drain electrode (29), wherein a surface of the semiconductor substrate (2) is flat, and a distance between the semiconductor substrate (2) and the field plate electrode (24, 26) increases according as it goes along a direction from the gate electrode (22) towards the drain electrode (29). With this field effect transistor, the breakdown voltage BVdss is ensured; the chronological change in the set current is restrained; and the on-resistance of an amplifying element is reduced.

Abstract: The semiconductor device comprises: a semiconductor substrate (N+ substrate 110) containing a first conductivity type impurity implanted therein; a second conductivity type impurity-implanted layer (P+ implanted layer 114) at relatively high concentration, formed on the semiconductor substrate (N+ substrate 110); a second conductivity type impurity epitaxial layer (P? epitaxial layer 111) at relatively low concentration, formed on the second conductivity type impurity-implanted layer (P+ implanted layer 114); and a field effect transistor 100 (N-channel type lateral MOSFET 100)composed of a pair of impurity diffusion regions (N+ source diffusion layer 115 and N? drain layer 116) provided in the second conductivity type impurity epitaxial layer (P? epitaxial layer 111) and a gate electrode 117 provided over a region sandwiched with the pair of impurity diffusion regions (N+ source diffusion layer 115 and N? drain layer 116).

Abstract: In a semiconductor device having a semiconductor substrate, an internal electrode layer is formed on the semiconductor substrate. A barrier metal layer is formed on the internal electrode. An external electrode layer is formed on the barrier metal layer. A pad electrode is made of the internal electrode layer, the barrier metal layer, and the external electrode layer. A wire is electrically connected to the pad electrode. An area of the external electrode layer is set midway between an area of a polymerization portion of the wire on the pad electrode and a planar area of the barrier metal layer.

Abstract: In a semiconductor device having a semiconductor substrate, an internal electrode layer is formed on the semiconductor substrate. A barrier metal layer is formed on the internal electrode. An external electrode layer is formed on the barrier metal layer. A pad electrode is made of the internal electrode layer, the barrier metal layer, and the external electrode layer. A wire is electrically connected to the pad electrode. An area of the external electrode layer is set midway between an area of a polymerization portion of the wire on the pad electrode and a planar area of the barrier metal layer.

Abstract: The present invention provides a bonding structure between a bonding pad and a bonding portion of a bonding wire made of an Au-base material, wherein said bonding pad further comprises: a base layer; at least a barrier layer overlying said base layer; and a bonding layer overlying said at least barrier layer, said bonding layer including an Al-base material, and wherein said bonding portion of said bonding wire is buried in said bonding layer, and an Au—Al alloy layer extends on an interface between said bonding portion and said bonding layer, and a bottom of said Au—Al alloy layer is in contact with or adjacent to an upper surface of said barrier layer.

Abstract: The present invention provides a bonding structure between a bonding pad and a bonding portion of a bonding wire made of an Au-base material, wherein said bonding pad further comprises: a base layer; at least a barrier layer overlying said base layer; and a bonding layer overlying said at least barrier layer, said bonding layer including an Al-base material, and wherein said bonding portion of said bonding wire is buried in said bonding layer, and an Au—Al alloy layer extends on an interface between said bonding portion and said bonding layer, and a bottom of said Au—Al alloy layer is in contact with or adjacent to an upper surface of said barrier layer.