Abstract: A semiconductor module including first and second transistors coupled in parallel to a first line receiving a power supply voltage, a driver circuit configured to apply, to a second line, a first voltage to turn on the first and second transistors in response to an input signal, a first resistor having two ends respectively coupled to the second line and a control electrode of the second transistor, a second resistor having two end respectively coupled to one of the two ends of the first resistor and a control electrode of the first transistor, a third resistor coupled to the second transistor, a third transistor coupled to one of the two ends of the second resistor, and a terminal coupled to the first to third transistors, the third resistor, and a load, such that the load receives a current from the first transistor.

Abstract: A semiconductor module including first and second transistors coupled in parallel to a first line receiving a power supply voltage, a driver circuit configured to apply, to a second line, a first voltage to turn on the first and second transistors in response to an input signal, a first resistor having two ends respectively coupled to the second line and a control electrode of the second transistor, a second resistor having two end respectively coupled to one of the two ends of the first resistor and a control electrode of the first transistor, a third resistor coupled to the second transistor, a third transistor coupled to one of the two ends of the second resistor, and a terminal coupled to the first to third transistors, the third resistor, and a load, such that the load receives a current from the first transistor.

Abstract: A semiconductor module including a first switching device coupled to a first line, a terminal, at which a first voltage corresponding to a first current flowing through the first switching device is generated, coupled to the first switching device, a second switching device coupled to the first line for allowing a second current corresponding to the first current to flow therethrough, a voltage generation circuit configured to apply, to a second line, a second voltage lower than a power supply voltage, a resistor, across which a third voltage corresponding to the second current is generated, coupled between the second switching device and the terminal, a reference voltage circuit coupled to the terminal for generating a fourth voltage, and a comparator circuit coupled between the first and second lines, for determining whether the first switching device is in an overcurrent state based on a comparison between the third and fourth voltages.

Abstract: A semiconductor device includes a power semiconductor chip, a threshold setting unit and a breaker circuit. The power semiconductor chip is connected between an output terminal and an earth terminal, and is configured to be turned on or off according to a potential at a gate terminal thereof. The threshold setting unit outputs an interrupt signal upon detecting that a voltage of a control signal received at an input terminal is lower than a predetermined voltage. The breaker circuit is connected between the gate terminal and the earth terminal, and switches on upon receiving the interrupt signal to thereby turn off the power semiconductor chip. The threshold setting unit includes a feed circuit that is configured to supply an electric charge stored in gate capacitance of the power semiconductor chip to the threshold setting unit responsive to a sudden drop of the voltage of the control signal.

Abstract: A semiconductor device includes a power semiconductor chip, a threshold setting unit and a breaker circuit. The power semiconductor chip is connected between an output terminal and an earth terminal, and is configured to be turned on or off according to a potential at a gate terminal thereof. The threshold setting unit outputs an interrupt signal upon detecting that a voltage of a control signal received at an input terminal is lower than a predetermined voltage. The breaker circuit is connected between the gate terminal and the earth terminal, and switches on upon receiving the interrupt signal to thereby turn off the power semiconductor chip. The threshold setting unit includes a feed circuit that is configured to supply an electric charge stored in gate capacitance of the power semiconductor chip to the threshold setting unit responsive to a sudden drop of the voltage of the control signal.

Abstract: An insulated-gate semiconductor device has a multi-channel structure with a plurality of unit-cells arranged in parallel on a semiconductor chip, wherein a main-electrode causing a main current to flow in the semiconductor chip is defined so as to be divided into an inter-electrode portion metallurgically connected to the semiconductor chip between gate electrodes of each of the unit-cells and a covering portion being continuous with the inter-electrode portion and provided on the gate electrode of each of the unit-cells through an interlayer insulating film, wherein an area ratio of the inter-electrode portion to the covering portion of the main-electrode exposed to an opening cut in a protective film covering the semiconductor chip is larger than an area ratio of the inter-electrode portion to the covering portion of the main-electrode located under the protective film.

Abstract: A semiconductor apparatus can block the voltage from the power source when the voltage from the power source reaches an excessive level, without requiring a larger chip size. Provided is a semiconductor apparatus including a power semiconductor element a gate of which is controlled in response to a control signal, an overvoltage detector configured to detect that a voltage at a collector terminal of the power semiconductor element reaches an overvoltage level, and a block unit configured to, in response to the detection of the overvoltage level, control the gate of the power semiconductor element to transition to an off-voltage. The semiconductor apparatus may further include a reset unit configured to, in response to that the control signal is input that turns on the power semiconductor element, output a reset signal for a predetermined period of time.

Abstract: A semiconductor apparatus is provided, comprising: a power semiconductor element which is connected between a first terminal on a high-potential side and a second terminal on a low-potential side; a first gate control section which controls a gate potential of the power semiconductor element according to a control signal; a discharge circuit which is discharges charges that are charged by the gate of the power semiconductor element; a second gate control section which controls the gate potential of the power semiconductor element according to a collector current of the power semiconductor element; a feedback section which feedbacks the charges to the gate of the power semiconductor element according to the collector potential of the power semiconductor element; and a current cutting off section which cuts off currents flowing from the first terminal to the gate of the power semiconductor element according to the control signal.

Abstract: A super junction MOSFET device including a semiconductor substrate; a base region provided on a primary surface side of the semiconductor substrate and having impurities of a first conductivity type; a source region that includes a portion of a frontmost surface of the base region and has impurities of a second conductivity type; a gate electrode that penetrates through the base region; a source electrode that is provided on the base region and is electrically connected to the source region; and a front surface region that is provided on an entirety of the frontmost surface of the base region in a region differing from a region where the source region and the gate electrode are provided in the base region, is electrically connected to the source electrode provided on the base region, and has a lower impurity concentration of impurities of the second conductivity type than the source region.

Abstract: A drive circuit that operates stably and has a small circuit size. Provided is a switch apparatus including a power semiconductor element connected between a first terminal on a high potential side and a second terminal on a low potential side; a capacitor; a charging section that charges the capacitor for at least a portion of an interval during which the power semiconductor element is OFF; a discharging section that causes the capacitor to gradually discharge, in response to the power semiconductor element becoming ON; and a cutoff section that sets the power semiconductor element to an OFF state, in response to a voltage of the capacitor becoming lower than a threshold voltage.

Abstract: An insulated-gate semiconductor device has a multi-channel structure with a plurality of unit-cells arranged in parallel on a semiconductor chip, wherein a main-electrode causing a main current to flow in the semiconductor chip is defined so as to be divided into an inter-electrode portion metallurgically connected to the semiconductor chip between gate electrodes of each of the unit-cells and a covering portion being continuous with the inter-electrode portion and provided on the gate electrode of each of the unit-cells through an interlayer insulating film, wherein an area ratio of the inter-electrode portion to the covering portion of the main-electrode exposed to an opening cut in a protective film covering the semiconductor chip is larger than an area ratio of the inter-electrode portion to the covering portion of the main-electrode located under the protective film.

Abstract: A semiconductor device includes a power semiconductor element that is connected between a first terminal on a high potential side and a second terminal on a low potential side and that is controlled to be on or off corresponding to a gate potential, a turn-off condition detector that detects whether a control signal input from a control terminal and controlling the power semiconductor element satisfies a predetermined turn-off condition, a first switching element that controls the gate potential of the power semiconductor element to be an off-potential when the turn-off condition detector detects that the turn-off condition is satisfied, and a detector for a collector current of the power semiconductor element. The turn-off condition detector uses the control signal and the collector current as the turn-off condition.

Abstract: A device includes a vertical semiconductor switch including (i) a gate terminal and a first terminal provided on a substrate and (ii) a second terminal provided on the substrate, where the vertical semiconductor switch is configured to electrically connect or disconnect the first terminal and the second terminal, a first insulative film provided on the substrate, a second insulative film provided on the substrate, where the second insulative film is in contact with the first insulative film and thinner than the first insulative film, and a zener diode formed on the first insulative film and the second insulative film, where the zener diode includes a first portion that is formed on the first insulative film and connected to the first surface of the substrate and a second portion that is formed on the second insulative film and connected to the gate terminal.

Abstract: A super junction MOSFET device including a semiconductor substrate; a base region provided on a primary surface side of the semiconductor substrate and having impurities of a first conductivity type; a source region that includes a portion of a frontmost surface of the base region and has impurities of a second conductivity type; a gate electrode that penetrates through the base region; a source electrode that is provided on the base region and is electrically connected to the source region; and a front surface region that is provided on an entirety of the frontmost surface of the base region in a region differing from a region where the source region and the gate electrode are provided in the base region, is electrically connected to the source electrode provided on the base region, and has a lower impurity concentration of impurities of the second conductivity type than the source region.

Abstract: A super junction MOSFET device including a semiconductor substrate; a base region provided on a primary surface side of the semiconductor substrate and having impurities of a first conductivity type; a source region that includes a portion of a frontmost surface of the base region and has impurities of a second conductivity type; a gate electrode that penetrates through the base region; a source electrode that is provided on the base region and is electrically connected to the source region; and a front surface region that is provided on an entirety of the frontmost surface of the base region in a region differing from a region where the source region and the gate electrode are provided in the base region, is electrically connected to the source electrode provided on the base region, and has a lower impurity concentration of impurities of the second conductivity type than the source region.

Abstract: A semiconductor apparatus is provided, comprising a power semiconductor element which is connected between a first terminal on a high-potential side and a second terminal on a low-potential side and is controlled to be turned on or off according to a gate potential, a cut-off condition detection section which detects whether or not a control signal that is input from a control terminal and controls the power semiconductor element satisfies a predetermined cut-off condition, and a cut-off circuit which controls the gate potential of the power semiconductor element to be an OFF potential in response to the cut-off condition detection section detecting that the cut-off condition is satisfied, and the cut-off condition detection section has an input terminal connected to the first terminal and the control terminal, and uses an electrical signal input from the input terminal as a power source.

Abstract: A semiconductor apparatus including a power semiconductor element connected between a first terminal on a high potential side and a second terminal on a low potential side, and controlled to be ON or OFF according to a gate potential thereof; a switch element connected between a control terminal that inputs a control signal for controlling the power semiconductor element and a gate of the power semiconductor element, and controlled to be ON or OFF according to a gate potential thereof; an ON potential supplying section connected between the first terminal and a gate of the switch element, that supplies an ON potential to the gate of the switch element; and an OFF potential supplying section connected between a reference potential and the gate of the switch element, that sets the gate potential of the switch element to an OFF potential in response to a predetermined cutoff condition being satisfied.

Abstract: A semiconductor device includes a power semiconductor element that is connected between a first terminal on a high potential side and a second terminal on a low potential side and that is controlled to be on or off corresponding to a gate potential, a turn-off condition detector that detects whether a control signal input from a control terminal and controlling the power semiconductor element satisfies a predetermined turn-off condition, a first switching element that controls the gate potential of the power semiconductor element to be an off-potential when the turn-off condition detector detects that the turn-off condition is satisfied, and a detector for a collector current of the power semiconductor element. The turn-off condition detector uses the control signal and the collector current as the turn-off condition.

Abstract: A semiconductor apparatus is provided, including a power semiconductor element, a cutoff condition detection portion which detects whether a predetermined cutoff condition is met, a reset portion which outputs a reset signal that instructs to reset during a predetermined period in response to an input of the control signal turning the power semiconductor element on, a latch portion which is reset in response to the reset signal and latches that an occurrence of the cutoff condition is detected after the reset, a cutoff circuit which controls the gate of the power semiconductor element to be at an OFF potential in response to the latching of the occurrence of the cutoff condition by the latch portion, and a prevention circuit which prevents the gate of the power semiconductor element from being at an ON potential during a period of reset of the latch portion even if the cutoff condition is met.

Abstract: A semiconductor apparatus is provided, comprising: a power semiconductor element which is connected between a first terminal on a high-potential side and a second terminal on a low-potential side; a first gate control section which controls a gate potential of the power semiconductor element according to a control signal; a discharge circuit which is discharges charges that are charged by the gate of the power semiconductor element; a second gate control section which controls the gate potential of the power semiconductor element according to a collector current of the power semiconductor element; a feedback section which feedbacks the charges to the gate of the power semiconductor element according to the collector potential of the power semiconductor element; and a current cutting off section which cuts off currents flowing from the first terminal to the gate of the power semiconductor element according to the control signal.