Patents by Inventor Shigemi Murakawa
Shigemi Murakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10480073Abstract: The present invention provides a rotating semi-batch ALD device and process which ensure high productivity, minimal particle formation, low gas consumption and high coverage during the production of semiconductors, liquid crystals, LEDs and/or solar cells. The rotating semi-batch ALD device and ALD process are characterized in that: a reaction gas supply means is configured from a shower plate for evenly discharging gas, a cavity for allowing gas to flow down gradually, and a partition wall surrounding the shower plate and the cavity; and a purge gas supply means is configured from a shower plate that causes gas to flow evenly at a high flow velocity in the transverse direction in the narrow gap between the purge gas supply means and substrates being treated.Type: GrantFiled: August 21, 2015Date of Patent: November 19, 2019Inventor: Shigemi Murakawa
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Publication number: 20150361553Abstract: The present invention provides a rotating semi-batch ALD device and process which ensure high productivity, minimal particle formation, low gas consumption and high coverage during the production of semiconductors, liquid crystals, LEDs and/or solar cells. The rotating semi-batch ALD device and ALD process are characterized in that: a reaction gas supply means is configured from a shower plate for evenly discharging gas, a cavity for allowing gas to flow down gradually, and a partition wall surrounding the shower plate and the cavity; and a purge gas supply means is configured from a shower plate that causes gas to flow evenly at a high flow velocity in the transverse direction in the narrow gap between the purge gas supply means and substrates being treated.Type: ApplicationFiled: August 21, 2015Publication date: December 17, 2015Inventor: SHIGEMI MURAKAWA
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Patent number: 8573151Abstract: A conventional microwave plasma processing apparatus, even when krypton (Kr) is used as a plasma-generation gas, can only obtain an oxide film or a nitride film having the same level of characteristics as those obtained when a rare gas such as argon (Ar) is used as a plasma-generation gas. Accordingly, instead of forming a dielectric window of a microwave plasma processing apparatus with only a ceramic member, a planarization film capable of obtaining a stoichiometric SiO2 composition by thermal treatment is coated on one of a plurality of surfaces of the ceramic member, the surface facing a process space, and then thermally-treated, thereby forming a planarization insulation film having a very flat and dense surface. A corrosion-resistant film is formed on the planarization insulation film.Type: GrantFiled: February 26, 2009Date of Patent: November 5, 2013Assignees: Tokyo Electron Limited, Tohoku UniversityInventors: Tadahiro Ohmi, Masaki Hirayama, Tetsuya Goto, Yasuyuki Shirai, Masafumi Kitano, Kohei Watanuki, Takaaki Matsuoka, Shigemi Murakawa
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Publication number: 20100098851Abstract: Techniques for atomic layer deposition (ALD) are disclosed. In one particular exemplary embodiment, the techniques may be realized as a system for ALD comprising a plurality of reactors in a stacked configuration, wherein each reactor comprises a wafer holding portion for holding a target wafer, a gas assembly coupled to the plurality of reactors and configured to provide at least one gas to at least one of the plurality of reactors, and an exhaust assembly coupled to the plurality of reactors and configured to exhaust the at least one gas from the at least one of the plurality of reactors. The gas assembly may further comprise a valve assembly coupled to each of the first gas inlet, the second gas inlet, and the third gas inlet, where the valve assembly is configured to selectively release at least one of the first gas, the second gas, and the third gas.Type: ApplicationFiled: October 20, 2008Publication date: April 22, 2010Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Shigemi MURAKAWA, Vikram Singh, George Papasouliotis, Joseph C. Olson, Paul J. Murphy, Gary E. Dickerson
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Publication number: 20100029038Abstract: There is manufactured a solar cell having a high energy conversion efficiency. A surface layer of a polycrystalline silicon layer serving as a n-type layer formed on a polycrystalline silicon substrate serving as a p-type layer is oxidized by using plasma and then a silicon nitride film is deposited by a CVD process, whereby a passivation film is formed on the surface layer of the polycrystalline silicon layer. The plasma oxidation process is performed by using plasma having a sheath potential equal to or less than about 10 eV at a pressure ranging from about 6.67 Pa to about 6.67×102 Pa and at a temperature ranging from about 200° C. to about 600° C. A microwave for exciting plasma is supplied into a processing chamber through a slot antenna, and plasma is generated by a surface wave of the microwave.Type: ApplicationFiled: November 6, 2007Publication date: February 4, 2010Applicant: TOKYO ELECTRON LIMITEDInventor: Shigemi Murakawa
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Publication number: 20090218044Abstract: A conventional microwave plasma processing apparatus, even when krypton (Kr) is used as a plasma-generation gas, can only obtain an oxide film or a nitride film having the same level of characteristics as those obtained when a rare gas such as argon (Ar) is used as a plasma-generation gas. Accordingly, instead of forming a dielectric window of a microwave plasma processing apparatus with only a ceramic member, a planarization film capable of obtaining a stoichiometric SiO2 composition by thermal treatment is coated on one of a plurality of surfaces of the ceramic member, the surface facing a process space, and then thermally-treated, thereby forming a planarization insulation film having a very flat and dense surface. A corrosion-resistant film is formed on the planarization insulation film.Type: ApplicationFiled: February 26, 2009Publication date: September 3, 2009Applicants: TOKYO ELECTRON LIMITED, TOHOKU UNIVERSITYInventors: Tadahiro OHMI, Masaki HIRAYAMA, Tetsuya GOTO, Yasuyuki SHIRAI, Masafumi KITANO, Kohei WATANUKI, Takaaki MATSUOKA, Shigemi MURAKAWA
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Publication number: 20080214017Abstract: A gate insulation film (104) of a MISFET (100) is constituted of a silicon oxide film (106), silicon nitride film (107), and high-permittivity film (108). The silicon oxide film (106) and silicon nitride film (107) are formed by microwave plasma processing with a radial line slot antenna.Type: ApplicationFiled: December 31, 2007Publication date: September 4, 2008Applicant: Tokyo Electron LimitedInventors: Shigemi Murakawa, Toshikazu Kumai, Toshio Nakanishi
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Patent number: 7374635Abstract: A gate insulation film (104) of a MISFET (100) is constituted of a silicon oxide film (106), silicon nitride film (107), and high-permittivity film (108). The silicon oxide film (106) and silicon nitride film (107) are formed by microwave plasma processing with a radial line slot antenna.Type: GrantFiled: December 11, 2006Date of Patent: May 20, 2008Assignee: Tokyo Electron LimitedInventors: Shigemi Murakawa, Toshikazu Kumai, Toshio Nakanishi
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Publication number: 20070224837Abstract: A process for producing electronic device (for example, high-performance MOS-type semiconductor device) structure having a good electric characteristic, wherein an SiO2 film or SiON film is used as an insulating film having an extremely thin (2.5 nm or less, for example) film thickness, and poly-silicon, amorphous-silicon, or SiGe is used as an electrode. In the presence of process gas comprising oxygen and an inert gas, plasma including oxygen and the inert gas (or plasma comprising nitrogen and an inert gas, or plasma comprising nitrogen, an inert gas and hydrogen) is generated by irradiating a wafer W including Si as a main component with microwave via a plane antenna member SPA. An oxide film (or oxynitride film) is formed on the wafer surface by using the thus generated plasma, and as desired, an electrode of poly-silicon, amorphous-silicon, or SiGe is formed, to thereby form an electronic device structure.Type: ApplicationFiled: January 26, 2007Publication date: September 27, 2007Applicant: TOKYO ELECTRON LIMITEDInventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
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Publication number: 20070218687Abstract: A process for producing an electronic device material of a high quality MOS-type semiconductor comprising an insulating layer and a semiconductor layer excellent in the electrical characteristic. The process includes: a step of CVD-treating a substrate to be processed comprising single-crystal silicon as a main component, to thereby form an insulating layer; and a step of exposing the substrate to be processed to a plasma which has been generated from a process gas on the basis of microwave irradiation via a plane antenna member having a plurality of slots, to thereby modify the insulating film by using the thus generated plasma.Type: ApplicationFiled: May 9, 2007Publication date: September 20, 2007Applicant: Tokyo Electron LimitedInventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
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Patent number: 7217659Abstract: A process for producing an electronic device material of a high quality MOS-type semiconductor having an insulating layer and a semiconducting layer. The process includes a step of CVD-treating a substrate to be processed having single-crystal silicon as a main component to thereby form an insulating layer, and a step of exposing the substrate to be processed to a plasma which has been generated from a process gas on the basis of microwave irradiation via a plane antenna member having a plurality of slots to thereby modify the insulating film by using the thus generated plasma.Type: GrantFiled: March 2, 2005Date of Patent: May 15, 2007Assignee: Tokyo Electron LimitedInventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
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Publication number: 20070085154Abstract: A gate insulation film (104) of a MISFET (100) is constituted of a silicon oxide film (106), silicon nitride film (107), and high-permittivity film (108). The silicon oxide film (106) and silicon nitride film (107) are formed by microwave plasma processing with a radial line slot antenna.Type: ApplicationFiled: December 11, 2006Publication date: April 19, 2007Applicant: Tokyo Electron LimitedInventors: Shigemi Murakawa, Toshikazu Kumai, Toshio Nakanishi
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Patent number: 7166185Abstract: The silicon oxide film (106) and silicon nitride film (107) are formed by microwave plasma processing with a radial line slot antenna.Type: GrantFiled: August 29, 2002Date of Patent: January 23, 2007Assignee: Tokyo Electron LimitedInventors: Shigemi Murakawa, Toshikazu Kumai, Toshio Nakanishi
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Publication number: 20050233599Abstract: A process for producing electronic device (for example, high-performance MOS-type semiconductor device) structure having a good electric characteristic, wherein an SiO2 film or SiON film is used as an insulating film having an extremely thin (2.5 nm or less, for example) film thickness, and poly-silicon, amorphous-silicon, or SiGe is used as an electrode. In the presence of process gas comprising oxygen and an inert gas, plasma including oxygen and the inert gas (or plasma comprising nitrogen and an inert gas, or plasma comprising nitrogen, an inert gas and hydrogen) it generated by irradiating a wafer W including Si as a main component with microwave via a plane antenna member SPA. An oxide film (or oxynitride film) is formed on the wafer surface by using the thus generated plasma, and as desired, an electrode of poly-silicon, amorphous-silicon, or SiGe is formed, to thereby form an electronic device structure.Type: ApplicationFiled: June 16, 2005Publication date: October 20, 2005Applicants: Tokyo Electron Limited, Makoto ANDOInventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
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Publication number: 20050176263Abstract: A process for producing an electronic device material of a high quality MOS-type semiconductor comprising an insulating layer and a semiconductor layer excellent in the electrical characteristic. The process includes: a step of CVD-treating a substrate to be processed comprising single-crystal silicon as a main component, to thereby form an insulating layer; and a step of exposing the substrate to be processed to a plasma which has been generated from a process gas on the basis of microwave irradiation via a plane antenna member having a plurality of slots, to thereby modify the insulating film by using the thus generated plasma.Type: ApplicationFiled: March 2, 2005Publication date: August 11, 2005Applicant: Tokyo Electron LimitedInventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
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Patent number: 6897149Abstract: A process for producing an electronic device material of a high quality MOS-type semiconductor having an insulating layer and a semiconductor layer with excellent electrical characteristics. A substrate incorporating single-crystal silicon as a main component is CVD-treated to form an insulating layer. The substrate is then exposed to a plasma generated from a process gas by microwave radiation from a plane antenna having a plurality of slots, to thereby modify the insulating film.Type: GrantFiled: January 25, 2002Date of Patent: May 24, 2005Assignee: Tokyo Electron LimitedInventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
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Publication number: 20050003660Abstract: A hole which is to be a part of an interconnection (wiring) hole (21) is formed penetrating through a second insulating layer (13) and a third insulating layer (14) made of porous silicon oxide film, by etching. Further, a second groove (23) is formed on the third insulating layer (14) using a second stopper film (20), by etching. Further, direct nitriding of a silicon oxide film applying an RLSA plasma processing deice is carried out on the side wall of the interconnection hole (21) and the second groove (23), and a barrier layer (25) made of SiN film is formed. Here, the second stopper film (20) and the barrier layer (25) are formed by the same direct nitriding.Type: ApplicationFiled: August 29, 2002Publication date: January 6, 2005Inventors: Shigemi Murakawa, Minoru Matsushita, Shigenori Ozaki
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Publication number: 20040245584Abstract: A gate insulation film (104) of a MISFET (100) is constituted of a silicon oxide film (106), silicon nitride film (107), and high-permittivity film (108). The silicon oxide film (106) and silicon nitride film (107) are formed by microwave plasma processing with a radial line slot antenna.Type: ApplicationFiled: February 27, 2004Publication date: December 9, 2004Inventors: Shigemi Murakawa, Toshikazu Kumai, Toshio Nakanishi
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Publication number: 20040241968Abstract: An impurity diffusion layer that structures a source region (15) and a drain electrode (16) of a pMOS 11 is formed extremely shallow, with a depth of approximately 50 nm. The extremely shallow impurity diffusion layer is formed by carrying out annealing process using RLSA plasma, after ion implantation processing at a low energy. In the annealing process, only silicon atoms near the surface of a silicon substrate (12) are selectively excited by the RLSA plasma, and impurity diffusion towards depth direction is suppressed.Type: ApplicationFiled: February 27, 2004Publication date: December 2, 2004Inventors: Shigemi Murakawa, Shinichi Sato, Toshio Nakanishi
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Publication number: 20040142577Abstract: A process for producing electronic device (for example, high-performance MOS-type semiconductor device) structure having a good electric characteristic, wherein an SiO2 film or SiON film is used as an insulating film having an extremely thin (2.5 nm or less, for example) film thickness, and poly-silicon, amorphous-silicon, or SiGe is used as an electrode. In the presence of process gas comprising oxygen and an inert gas, plasma including oxygen and the inert gas (or plasma comprising nitrogen and an inert gas, or plasma comprising nitrogen, an inert gas and hydrogen) is generated by irradiating a wafer W including Si as a main component with microwave via a plane antenna member SPA. An oxide film (or oxynitride film) is formed on the wafer surface by using the thus generated plasma, and as desired, an electrode of poly-silicon, amorphous-silicon, or SiGe is formed, to thereby form an electronic device structure.Type: ApplicationFiled: July 18, 2003Publication date: July 22, 2004Inventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada