Abstract: A voltage control circuit accepts an input voltage and produces a regulated output voltage. Embodiments provide improved responsiveness to variations in input voltage, load current, and ambient temperature. Exemplary embodiments include an NPN transistor connected between the input and output terminals, which is controlled by a feedback circuit. In an embodiment, the feedback circuit includes a PMOS transistor and in another embodiment the feedback circuit includes a PNP transistor.

Abstract: A voltage control circuit accepts an input voltage and produces a regulated output voltage. Embodiments provide improved responsiveness to variations in input voltage, load current, and ambient temperature. Exemplary embodiments include an NPN transistor connected between the input and output terminals, which is controlled by a feedback circuit. In an embodiment, the feedback circuit includes a PMOS transistor and in another embodiment the feedback circuit includes a PNP transistor.

Abstract: In order to provide a comparator circuit without generating a malfunction, the comparator circuit according to the present invention may comprise a comparator circuit including a differential amplification circuit having a differential pair transistor (M1, M2) for inputting a signal as an object of comparison, and a current mirror load circuit (M3, M4, M5, M6); a latch circuit having inversion amplifiers that are configured so that an input of one amplifier becomes an input of other amplifier so as to amplify a differential output signal outputted from the current mirror load circuit in accordance with a magnitude relation of the signal as an object of comparison; an equalization transistor (M9) for equalizing a signal of the differential amplification circuit; a delay circuit (M13, M14,M15, M16) for generating a signal to delay a control signal to be inputted in a control electrode of the equalization transistor; and a control transistor (M10) for inputting an output signal of the delay circuit in the contro

Abstract: In order to provide a comparator circuit without generating a malfunction, the comparator circuit according to the present invention may comprise a comparator circuit including a differential amplification circuit having a differential pair transistor (M1, M2) for inputting a signal as an object of comparison, and a current mirror load circuit (M3, M4, M5, M6); a latch circuit having inversion amplifiers that are configured so that an input of one amplifier becomes an input of other amplifier so as to amplify a differential output signal outputted from the current mirror load circuit in accordance with a magnitude relation of the signal as an object of comparison; an equalization transistor (M9) for equalizing a signal of the differential amplification circuit; a delay circuit (M13, M14,M15, M16) for generating a signal to delay a control signal to be inputted in a control electrode of the equalization transistor; and a control transistor (M10) for inputting an output signal of the delay circuit in the contro

Abstract: An array of LEDs is controlled by a control circuit so as to emit light in a write mode and sense light in a read mode. In the read mode, each LED is alternately charged for a first interval, then allowed to discharge by flow of photocurrent for a second interval. At the end of the second interval, just before charging of the LED begins again, the anode voltage of the LED is read by coupling the anode of the LED to an output terminal for a third interval. The third interval of each LED may coincide with the first interval of the preceding LED in tile array, so that each LED is read while the preceding LED is being charged.