Patents by Inventor Shigemori Ookawa

Shigemori Ookawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11018996
    Abstract: A packet transfer device includes a circuit configured to include a first queue to store a first packet classified into a high priority class and a second queue to store a second packet classified into a low priority class, a memory configured to store data configured to indicate possibilities of output for the first packet and the second packet for each time slot, a processor coupled to the memory and configured to control the output of the first packet and the second packet for each time slot according to the data stored in the memory, count a number of discards of the second packet within the second queue in a predetermined cycle, and change the data stored in the memory, when the number of discards is less than a first predetermined value, so as to reduce an output period of the second packet every the time slot.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: May 25, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Norikazu Hikimochi, Ryuichi Kimura, Shigemori Ookawa
  • Publication number: 20190356612
    Abstract: A packet transfer device includes a circuit configured to include a first queue to store a first packet classified into a high priority class and a second queue to store a second packet classified into a low priority class, a memory configured to store data configured to indicate possibilities of output for the first packet and the second packet for each time slot, a processor coupled to the memory and configured to control the output of the first packet and the second packet for each time slot according to the data stored in the memory, count a number of discards of the second packet within the second queue in a predetermined cycle, and change the data stored in the memory, when the number of discards is less than a first predetermined value, so as to reduce an output period of the second packet every the time slot.
    Type: Application
    Filed: May 7, 2019
    Publication date: November 21, 2019
    Applicant: FUJITSU LIMITED
    Inventors: NORIKAZU HIKIMOCHI, Ryuichi KIMURA, SHIGEMORI OOKAWA
  • Publication number: 20170237769
    Abstract: A packet transfer method includes requesting a terminal apparatus for a physical address corresponding to a logical address of a transmission source of a packet; determining legality of a correspondence relationship between the physical address and the logical address by comparing a physical address indicated by a response from the terminal apparatus with the physical address of the transmission source of the packet; storing a first set of the physical address of the transmission source and the logical address of the transmission source of the packet, when it is determined that the correspondence relationship is legal; when a new packet is received, determining whether a second set of a physical address of a transmission source and a logical address of the transmission source of the new packet coincides with the first set; and transferring the new packet, when it is determined that the second set coincides with the first set.
    Type: Application
    Filed: January 30, 2017
    Publication date: August 17, 2017
    Applicant: FUJITSU LIMITED
    Inventors: SHIGEMORI OOKAWA, Yoshinari Akakura, Takanori Sasaki, Takuya OKAMOTO, Tadayuki Nishihashi, TAKUYA MAEDA
  • Publication number: 20170093957
    Abstract: A transmission apparatus includes a plurality of ports configured to communicate with another transmission apparatus, a storage configured to store a data file, attribute information of the data file, and management information indicating to respond or not to a transfer request for the data file with respect to each of the plurality of ports, respectively, and a processor configured to transmit the attribute information from each of the plurality of ports, and decide whether or not to transmit the data file from a first port of the plurality of ports on the basis of the management information when the first port receives the transfer request from the other transmission apparatus.
    Type: Application
    Filed: September 15, 2016
    Publication date: March 30, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shigemori OOKAWA, Masaki TAKEDA, Takanori SASAKI, Ken TAKASHIMA, Kunitake SUGIMOTO
  • Patent number: 9485167
    Abstract: A processor determines, when a frame is received, whether a total of current learning numbers stored in a second storage unit has reached a total of maximum learning numbers. The processor identifies in the second storage unit, if it is determined that the total of current learning numbers has reached the total of maximum learning numbers, a first group identifier associated with a lower priority than a priority associated with a reception group identifier contained in the frame. The first group identifier is associated with a first current learning number not less than a first minimum learning number associated with the first group identifier. The processor replaces a first correspondence relationship including the first group identifier with a reception correspondence relationship among a port number of a port at which the frame has been received, a source address contained in the frame, and the reception group identifier.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: November 1, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Shigemori Ookawa
  • Publication number: 20140321470
    Abstract: A processor determines, when a frame is received, whether a total of current learning numbers stored in a second storage unit has reached a total of maximum learning numbers. The processor identifies in the second storage unit, if it is determined that the total of current learning numbers has reached the total of maximum learning numbers, a first group identifier associated with a lower priority than a priority associated with a reception group identifier contained in the frame. The first group identifier is associated with a first current learning number not less than a first minimum learning number associated with the first group identifier. The processor replaces a first correspondence relationship including the first group identifier with a reception correspondence relationship among a port number of a port at which the frame has been received, a source address contained in the frame, and the reception group identifier.
    Type: Application
    Filed: February 27, 2014
    Publication date: October 30, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Shigemori OOKAWA
  • Patent number: 8780701
    Abstract: A communication apparatus includes a high-priority link configured to transmit one or more high-priority packets that have a priority level greater than or equal to a given level; a plurality of low-priority links that are optically coupled to the same transmission destination as the high-priority link and are configured to transmit one or more low-priority packets that have a priority level less than the given level; a first distribution circuit configured to select the one or more high-priority packets from among input packets and distribute the selected one or more high-priority packets to the high-priority link; and a second distribution circuit configured to individually distribute one or more remaining input packets, which are the input packets that have not been distributed to the high-priority link by the first distribution circuit, to the plurality of low-priority links based on distribution information about distributing packets to the plurality of low-priority links.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: July 15, 2014
    Assignee: Fujitsu Limited
    Inventors: Takuya Maeda, Shigemori Ookawa
  • Patent number: 8462623
    Abstract: The present invention is comprised for pre-setting bandwidth control information of each user for each of the number of normal physical links which are integrated as a Link Aggregation, recognizing the number of currently normal physical links if a failure, or recovery therefrom, of a physical link which is integrated as the aforementioned Link Aggregation, and carrying out a bandwidth control, for each user traffic, corresponding to the number of the recognized normal physical links by referring to bandwidth control information of each user for each of the number of preset normal physical links, in order to prevent an occurrence of unfairness in usable bandwidth among the users even in the case of a failure occurrence in respective physical links which are logically integrated as a Link Aggregation.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: June 11, 2013
    Assignee: Fujitsu Limited
    Inventors: Tatsuya Abe, Yoshinari Akakura, Yuichi Yamagishi, Norihiro Yoshida, Hirotaka Yamada, Kiyoshi Miyano, Shigemori Ookawa, Norikazu Hikimochi
  • Publication number: 20120307628
    Abstract: A communication apparatus includes a high-priority link configured to transmit one or more high-priority packets that have a priority level greater than or equal to a given level; a plurality of low-priority links that are optically coupled to the same transmission destination as the high-priority link and are configured to transmit one or more low-priority packets that have a priority level less than the given level; a first distribution circuit configured to select the one or more high-priority packets from among input packets and distribute the selected one or more high-priority packets to the high-priority link; and a second distribution circuit configured to individually distribute one or more remaining input packets, which are the input packets that have not been distributed to the high-priority link by the first distribution circuit, to the plurality of low-priority links based on distribution information about distributing packets to the plurality of low-priority links.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 6, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Takuya Maeda, Shigemori Ookawa
  • Publication number: 20070047578
    Abstract: The present invention is comprised for pre-setting bandwidth control information of each user for each of the number of normal physical links which are integrated as a Link Aggregation, recognizing the number of currently normal physical links if a failure, or recovery therefrom, of a physical link which is integrated as the aforementioned Link Aggregation, and carrying out a bandwidth control, for each user traffic, corresponding to the number of the recognized normal physical links by referring to bandwidth control information of each user for each of the number of preset normal physical links, in order to prevent an occurrence of unfairness in usable bandwidth among the users even in the case of a failure occurrence in respective physical links which are logically integrated as a Link Aggregation.
    Type: Application
    Filed: November 7, 2005
    Publication date: March 1, 2007
    Inventors: Tatsuya Abe, Yoshinari Akakura, Yuichi Yamagishi, Norihiro Yoshida, Hirotaka Yamada, Kiyoshi Miyano, Shigemori Ookawa, Norikazu Hikimochi