Patents by Inventor Shigenobu Akiyama

Shigenobu Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5191405
    Abstract: Disclosed is a three-dimensionally stacked LSI having a plurality of integrated-circuit layers stacked together, each of which is equipped with a plurality of circuit elements. Each of the circuit elements are equipped a power terminal of its own, which is connected through interlayer via-hole wiring to the power wiring of the uppermost integrated-circuit layer. The power wiring of the uppermost integrated-circuit layer is formed of a metal exhibiting a low electrical resistance, for example, Al, whereas the metal wirings of the other layers, which are exposed to high temperatures when forming the upper layers, are formed of W.
    Type: Grant
    Filed: December 19, 1989
    Date of Patent: March 2, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Tomita, Yoshiyuki Takagi, Shigenobu Akiyama, Kenichi Yamazaki
  • Patent number: 4596604
    Abstract: A method of obtaining a multilayer semiconductor device by forming a semiconductor crystallized layer through an insulative material over a semiconductor substrate in which a semiconductor device is formed. The insulative material is formed on the semiconductor substrate in which the semiconductor device is fabricated and a first semiconductor layer is formed on the insulative material. Thereafter, the surface of the first semiconductor layer is planarized and an insulative material is formed on this planarized surface, then a second semiconductor layer is formed on this insulative material. Next, the second semiconductor layer is crystallized by the irradiation of an energy beam, thereby fabricating a device in the second crystallized semiconductor layer.
    Type: Grant
    Filed: October 17, 1984
    Date of Patent: June 24, 1986
    Assignee: Agency of Industrial Science and Technology
    Inventors: Shigenobu Akiyama, Yasuaki Terui, Shin-ichi Ogawa
  • Patent number: 4487635
    Abstract: A method of producing a superior semiconductor crystallized layer rapidly on a semiconductor substrate with the surface thereof covered with an insulating film is disclosed. An opening, desirably formed by at least two insulating films, is formed at an intersection of scribe lines of the semiconductor substrate. A polycrystal semiconductor film is formed on the insulating films and the opening, after which an energy beam is irradiated spirally on the polycrystal semiconductor film in such a manner that the beam passes at least one opening during each rotation thereof thereby to transform the polycrystal semiconductor film into a crystallized layer for forming a semiconductor element.
    Type: Grant
    Filed: February 14, 1983
    Date of Patent: December 11, 1984
    Assignee: Director-General of the Agency of Industrial Science & Technology
    Inventors: Koichi Kugimiya, Shigenobu Akiyama, Genshu Fuse