Patents by Inventor Shigenori Nakatuka

Shigenori Nakatuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6859990
    Abstract: The circuit characteristics of an intermediate layer between an uppermost layer and a lowermost layer of a ceramic multilayer substrate with substrates laminated can be evaluated. A method for evaluating the characteristics of the intermediate layer circuit is provided. The intermediate layer circuit is installed on the intermediate layer of the multilayer substrate and has a wiring and a grounding pad, holding grounding potential, formed in the vicinity of the wiring. The method includes steps of: irradiating a region of the upper layer substrate located above the grounding pad of the intermediate layer with a laser to ablate material to a predetermined thickness; polishing the upper layer substrate ablated to the predetermined thickness with a hard polishing tool to expose the wiring and/or grounding pad; and bringing a probe needle in contact with the exposed wiring and/or grounding pad to evaluate characteristics of the intermediate layer circuit.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: March 1, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigenori Nakatuka, Akira Inoue, Kenichiro Choumei
  • Publication number: 20030162310
    Abstract: The circuit characteristics of an intermediate layer between an uppermost layer and a lowermost layer of a ceramic multilayer substrate with substrates laminated can be evaluated. A method for evaluating the characteristics of the intermediate layer circuit is provided. The intermediate layer circuit is installed on the intermediate layer of the multilayer substrate and has a wiring and a grounding pad, holding grounding potential, formed in the vicinity of the wiring. The method includes steps of: irradiating a region of the upper layer substrate located above the grounding pad of the intermediate layer with laser to scrape to a predetermined thickness; polishing the upper layer substrate scraped to the predetermined thickness with a hard polishing tool to expose the wiring and/or grounding pad; and bringing a probe needle in contact with the exposed wiring and/or grounding pad to evaluate characteristics of the intermediate layer circuit.
    Type: Application
    Filed: September 18, 2002
    Publication date: August 28, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigenori Nakatuka, Akira Inoue, Kenichiro Choumei