Abstract: An improved structure of a spark plug is provided to ensure a high strength of joint between a ground electrode and a metal shell. The ground electrode is resistance-welded to the metal shell so that it is embedded partially in an end surface of the metal shell to create a weld interface extending from the end surface to an inner periphery of the metal shell, thus resulting in an increased size of the weld interface to increase the joint strength. The resistance welding keeps the temperature of a weld between the ground electrode and the metal shell at a lower level during welding as compared with laser welding, thus minimizing solidification cracking in the weld.

Abstract: An improved structure of a spark plug is provided to ensure a high strength of joint between a ground electrode and a metal shell. The ground electrode is resistance-welded to the metal shell so that it is embedded partially in an end surface of the metal shell to create a weld interface extending from the end surface to an inner periphery of the metal shell, thus resulting in an increased size of the weld interface to increase the joint strength. The resistance welding keeps the temperature of a weld between the ground electrode and the metal shell at a lower level during welding as compared with laser welding, thus minimizing solidification cracking in the weld.

Abstract: Receiving conditions are classified into three types-- "good condition", "intermediate condition" and "bad condition". Where the receiving condition is an "intermediate condition," a receiving section continues with a receiving operation by supplying power thereto through a first normally closed switch from a power source. Where the receiving condition is both a "good condition" and a "bad condition", the first normally closed switch is closed, only during a specific period having the necessary information signals supplied from a time band designating means, to supply power from the power source to the receiving section thus to extract the necessary information signals by a signal processing section from the receiving input signals supplied from the receiving section, whereas the first normally closed switch is opened, during the remaining period to interrupt the power supply from the power source to the receiving section thus to stop the receiving operation.

Abstract: A bit synchronization circuit which comprises a pulse generator for producing a pulse corresponding to a data signal received; a clock pulse oscillator for supplying a clock pulse having a frequency as high as four times the data speed of said data signal; a synchronization-controlling circuit supplied with signals from said pulse generator and clock pulse oscillator to produce a signal with a prescribed phase relative to a pulse delivered from said pulse generator; a ring counter whose reset terminal is supplied with an output signal from said synchronization-controlling circuit and whose count terminal is impressed with a clock pulse produced from said clock pulse oscillator; and a flip-flop circuit whose set terminal is supplied with the content "0" of said ring counter and whose reset terminal receives the content "2" thereof, thereby generating an output pulse synchronous with said data signal received.