Patents by Inventor Shigenori Saisu

Shigenori Saisu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8766089
    Abstract: A semiconductor substrate having an electrode formed thereon, the electrode including at least silver and glass frit, the electrode including: a multi-layered structure with a first electrode layer joined directly to the semiconductor substrate, and an upper electrode layer formed of at least one layer and disposed on the first electrode layer. The upper electrode layer is formed by firing a conductive paste having a total silver content of 75 wt % or more and 95 wt % or less, the content of silver particles having an average particle diameter of 4 ?m or greater and 8 ?m or smaller with respect to the total silver content in the upper electrode layer being higher than that in the first electrode layer.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: July 1, 2014
    Assignees: Shin-Etsu Handotai Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Naoki Ishikawa, Satoyuki Ojima, Hiroyuki Ohtsuka, Takenori Watabe, Shigenori Saisu, Toyohiro Ueguri
  • Publication number: 20120289044
    Abstract: A semiconductor substrate having an electrode formed thereon, the electrode including at least silver and glass frit, the electrode including: a multi-layered structure with a first electrode layer joined directly to the semiconductor substrate, and an upper electrode layer formed of at least one layer and disposed on the first electrode layer. The upper electrode layer is formed by firing a conductive paste having a total silver content of 75 wt % or more and 95 wt % or less, the content of silver particles having an average particle diameter of 4 ?m or greater and 8 ?m or smaller with respect to the total silver content in the upper electrode layer being higher than that in the first electrode layer.
    Type: Application
    Filed: July 27, 2012
    Publication date: November 15, 2012
    Applicants: SHIN-ETSU CHEMICAL CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Naoki ISHIKAWA, Satoyuki OJIMA, Hiroyuki OHTSUKA, Takenori WATABE, Shigenori SAISU, Toyohiro UEGURI
  • Patent number: 8253011
    Abstract: The present invention is directed to a semiconductor substrate having an electrode formed thereon, the electrode including at least silver and glass frit, the electrode including: a multi-layered structure constituted of a first electrode layer joined directly to the semiconductor substrate, and an upper electrode layer formed of at least one layer and disposed on the first electrode layer; wherein the upper electrode layer is formed by firing a conductive paste having a total silver content of 75 wt % or more and 95 wt % or less, the content of silver particles having an average particle diameter of 4 ?m or greater and 8 ?m or smaller with respect to the total silver content in the upper electrode layer being higher than that in the first electrode layer. As a consequence, it is possible to form the electrode, which has the high aspect ratio and hardly suffers an inconvenience such as a break, on the semiconductor substrate by a simple method.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: August 28, 2012
    Assignees: Shin-Etsu Handotai Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Naoki Ishikawa, Satoyuki Ojima, Hiroyuki Ohtsuka, Takenori Watabe, Shigenori Saisu, Toyohiro Ueguri
  • Publication number: 20090243111
    Abstract: The present invention is directed to a semiconductor substrate having an electrode formed thereon, the electrode including at least silver and glass frit, the electrode including: a multi-layered structure constituted of a first electrode layer joined directly to the semiconductor substrate, and an upper electrode layer formed of at least one layer and disposed on the first electrode layer; wherein the upper electrode layer is formed by firing a conductive paste having a total silver content of 75 wt % or more and 95 wt % or less, the content of silver particles having an average particle diameter of 4 ?m or greater and 8 ?m or smaller with respect to the total silver content in the upper electrode layer being higher than that in the first electrode layer. As a consequence, it is possible to form the electrode, which has the high aspect ratio and hardly suffers an inconvenience such as a break, on the semiconductor substrate by a simple method.
    Type: Application
    Filed: August 2, 2007
    Publication date: October 1, 2009
    Applicants: SHIN-ETSU HANDOTAI CO., LTD., SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Naoki Ishikawa, Satoyuki Ojima, Hiroyuki Ohtsuka, Takenori Watabe, Shigenori Saisu, Toyohiro Ueguri
  • Publication number: 20090020158
    Abstract: The present invention is a method for manufacturing a solar cell by forming a p-n junction in a semiconductor substrate having a first conductivity type, wherein, at least: a first coating material containing a dopant and an agent for preventing a dopant from scattering, and a second coating material containing a dopant, are coated on the semiconductor substrate having the first conductivity type so that the second coating material may be brought into contact with at least the first coating material; and, a first diffusion layer formed by coating the first coating material, and a second diffusion layer formed by coating the second coating material the second diffusion layer having a conductivity is lower than that of the first diffusion layer are simultaneously formed by a diffusion heat treatment; a solar cell manufactured by the method; and a method for manufacturing a semiconductor device.
    Type: Application
    Filed: April 11, 2006
    Publication date: January 22, 2009
    Applicants: SHIN-ETSU HANDOTAI CO., LTD., NAOETSU ELECTRONICS CO., LTD., SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hiroyuki Ohtsuka, Masatoshi Takahashi, Naoki Ishikawa, Shigenori Saisu, Toyohiro Ueguri, Satoyuki Ojima, Takenori Watabe, Takeshi Akatsuka, Tsutomu Onishi
  • Patent number: 5578504
    Abstract: A method for the determination of the resistivity of an n-type epitaxial layer formed on a silicon substrate is disclosed. This invention resides in either directly determining the true resistivity of a sample by preparing this sample without a natural oxide film which is responsible for the change with the passage of time or indirectly determining the true resistivity of a sample by intentionally forming on the sample a natural oxide film so stable to defy the change with the passage of time and measuring resistivity of this sample.
    Type: Grant
    Filed: July 15, 1994
    Date of Patent: November 26, 1996
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Kiyoshi Mitani, Shigenori Saisu