Abstract: A conductive layer contact structure is provided, in which a contact hole of a diameter smaller than the resolution of photolithography technique is formed in a stabilized manner by an etching with low aspect ratio, the contact resistance regarding a conductive layer formed through this contact hole is low, and the step coverage of the conductive layer is satisfactory such that it is not electrically short-circuited with other conductive layers. A silicon oxide film and a silicon nitride film are formed on a gate electrode as first insulation layers. A silicon oxide film is formed as a second insulation layer having a high etching selectivity with respect to the silicon nitride film provided as an upper insulation layer of the first insulation layer. Reaching a surface of an n+ diffused layer formed at a surface of a silicon substrate as a conductive region, a contact hole is formed. A sidewall spacer is formed at the inner sidewall of the silicon oxide film defining a hole.

Abstract: Within an interlayer dielectric film laid on a semiconductor substrate, a first conducting line is formed at a position lower than a second conducting line. Further, an etching stopper film, which has an etch selectivity differing from that of the interlayer dielectric films under a certain set of etching conditions, is formed at an intermediate position between the first conducting line and the second conducting line. A contact hole to reach the upper second conducting line is formed by etching under the condition that the interlayer dielectric film has a high etch selectivity with respect to the etching stopper film. The depth of a contact hole is controlled not to reach the lower first conducting line in the event the contact hole is offset from a upper conducting line.

Abstract: A film thickness measuring mechanism is provided in an orienter chamber (A or B) or a transport buffer chamber (5) of an etching apparatus. A wafer subjected to a predetermined etching process in an etching chamber (1), for example, is transported temporarily into the orienter chamber (A or B) or the transport buffer chamber (5) in which the film thickness measuring mechanism, in turn, measures an etch depth for the wafer. If the etch depth is out of predetermined tolerance with respect to an etch depth setting, an additional etching process is performed on the wafer. Etch time for the additional etching process is calculated from the actual etch depth measured by the film thickness measuring mechanism, the etch depth setting, and an etch rate of a film to be etched.

Abstract: A film thickness measuring mechanism is provided in an orienter chamber (A or B) or a transport buffer chamber (5) of an etching apparatus. A wafer subjected to a predetermined etching process in an etching chamber (1), for example, is transported temporarily into the orienter chamber (A or B) or the transport buffer chamber (5) in which the film thickness measuring mechanism, in turn, measures an etch depth for the wafer. If the etch depth is out of predetermined tolerance with respect to an etch depth setting, an additional etching process is performed on the wafer. Etch time for the additional etching process is calculated from the actual etch depth measured by the film thickness measuring mechanism, the etch depth setting, and an etch rate of a film to be etched.

Abstract: A chamber for plasma processing is provided with an upper electrode and a lower electrode for discharging plasma. The lower electrode also serves as a stage portion on which a semiconductor substrate is rested. The lower electrode is connected via a matching unit to a high-frequency power supply. A ring-shaped holding member is provided for holding the semiconductor substrate rested on the lower electrode. The holding member is formed of quartz containing platinum (Pt). The holding member is exposed to the plasma, and the platinum contained therein is provided into the chamber. The reductive effect of the platinum restricts deposition of reactive products onto the chamber inner wall.

Abstract: Within an interlayer dielectric film laid on a semiconductor substrate, a first conducting line is formed at a position lower than a second conducting line. Further, an etching stopper film, which has an etch selectivity differing from that of the interlayer dielectric films under a certain set of etching conditions, is formed at an intermediate position between the first conducting line and the second conducting line. A contact hole to reach the upper second conducting line is formed by etching under the condition that the interlayer dielectric film has a high etch selectivity with respect to the etching stopper film. The depth of a contact hole is controlled not to reach the lower first conducting line in the event the contact hole is offset from a upper conducting line.

Abstract: There is described formation of a contact hole without involvement of damage to an etching stopper film and deterioration of electric characteristics, achieved by means of a self-alignment method. An interlayer oxide film is etched through an opening of a resist mask, and by means of plasma etching through use of a processing gas comprising a mixture of a rare gas and a CF-based gas, thereby tapering a shoulder of the silicon nitride film. Alternatively, a silicon oxide film and a silicon nitride film are continually etched through an opening of the resist mask, by means of plasma etching through use of a CH2F2 gas added to a mixed gas including a rare gas and a C4F8 gas.

Abstract: Within an interlayer dielectric film laid on a semiconductor substrate, a first conducting line is formed at a position lower than a second conducting line. Further, an etching stopper film, which has an etch selectivity differing from that of the interlayer dielectric films under a certain set of etching conditions, is formed at an intermediate position between the first conducting line and the second conducting line. A contact hole to reach the upper second conducting line is formed by etching under the condition that the interlayer dielectric film has a high etch selectivity with respect to the etching stopper film. The depth of a contact hole is controlled not to reach the lower first conducting line in the event the contact hole is offset from a upper conducting line.

Abstract: The plasma processing apparatus includes an electrostatic adhesion electrode for having a wafer electrostatically adhere to it, a helium gas introducing element for introducing a helium gas in a pressure-controlled manner between the wafer and the electrostatic adhesion electrode when the wafer adheres electrostatically, and a rear surface pressure setting element for setting the pressure of the helium gas to a first pressure during the preliminary adhering step and for setting the pressure of the helium gas to a second pressure higher than the first pressure in the steady state after plasma ignition.

Abstract: There is described formation of a contact hole without involvement of damage to an etching stopper film and deterioration of electric characteristics, achieved by means of a self-alignment method. An interlayer oxide film is etched through an opening of a resist mask, and by means of plasma etching through use of a processing gas comprising a mixture of a rare gas and a CF-based gas, thereby tapering a shoulder of the silicon nitride film. Alternatively, a silicon oxide film and a silicon nitride film are continually etched through an opening of the resist mask, by means of plasma etching through use of a CH2F2 gas added to a mixed gas including a rare gas and a C4F8 gas.

Abstract: A gate electrode includes a polycrystalline silicon layer, a barrier layer and a metal layer. The metal layer and barrier layer includes for example W and RuO2 layers, respectively. In forming the gate electrode, the metal layer and barrier layer are etched using at least one of the barrier layer and polycrystalline silicon layer as an etching stopper.

Abstract: Provided is a plasma processing apparatus capable of extending an etching parameter to reduce charge-up shape anomalies in dry etching and to enhance etching performance such as selectivity, uniformity, processability or the like. A microwave is controlled to be modulated in frequency and is introduced into a chamber. An ECR face is moved between two positions according to the frequency of the microwave.

Abstract: Provided are a method for manufacturing contact structure to prevent, in the wire of a borderless structure, erosion in the contact area between the wire and a conductor. An interlayer insulating film (300) having a wire burying hole is formed and a conductor (400) is buried in the hole. Then, a wire layer (500) covering the hole is formed on the interlayer insulating film (300). The wire layer (500) is made so as to have a borderless structure by using a resist (540) as a mask. A barrier metal layer (510) suppresses erosion in the contact area between the conductor (400) and the wire layer (500).

Abstract: According to this invention, an etching stopper film constituted by a silicon nitride film is stacked on an insulating film constituted by a silicon oxide film for protecting a wiring to prevent damage to the wiring caused by anisotropic dry etching for forming a contact hole. A resist pattern having the same shape as that of the contact hole is formed by using a reflection prevention film containing nitrogen atoms, the etching stopper film and the reflection prevention film in a contact hole formation region which contain nitrogen atoms and have equal selectivity ratios under a predetermined condition are simultaneously removed by etching, so that a semiconductor device having stable performance and simple manufacturing steps can be obtained.

Abstract: According to this invention, an etching stopper film constituted by a silicon nitride film is stacked on an insulating film constituted by a silicon oxide film for protecting a wiring to prevent damage to the wiring caused by anisotropic dry etching for forming a contact hole. A resist pattern having the same shape as that of the contact hole is formed by using a reflection prevention film containing nitrogen atoms, the etching stopper film and the reflection prevention film in a contact hole formation region which contain nitrogen atoms and have equal selectivity ratios under a predetermined condition are simultaneously removed by etching, so that a semiconductor device having stable performance and simple manufacturing steps can be obtained.