Patents by Inventor Shigeo Fujishiro

Shigeo Fujishiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8792053
    Abstract: An image processing apparatus includes: a normal interpolated image generation unit to generate an image that is interpolated between a plurality of original images reproduced along time series, the image being a normal interpolated image, based on each of the plurality of original images; a high-frequency area extraction unit to extract a high-frequency area having a spatial frequency higher than a predetermined value in each of the plurality of original images; a high-frequency area interpolated image generation unit to generate an image that is interpolated between the plurality of original images, the image being a high-frequency area interpolated image, based on a change in position of the high-frequency area along with an elapse of time on the time series and on each of the plurality of original images; and a combination unit to execute combining processing to combine the normal interpolated image and the high-frequency area interpolated image.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: July 29, 2014
    Assignee: Sony Corporation
    Inventors: Shigeo Fujishiro, Yoshito Suzuki, Eiji Ozeki, Kazuhiro Takahashi, Takayoshi Fujiwara
  • Publication number: 20140176794
    Abstract: An image processing apparatus includes: a normal interpolated image generation unit to generate an image that is interpolated between a plurality of original images reproduced along time series, the image being a normal interpolated image, based on each of the plurality of original images; a high-frequency area extraction unit to extract a high-frequency area having a spatial frequency higher than a predetermined value in each of the plurality of original images; a high-frequency area interpolated image generation unit to generate an image that is interpolated between the plurality of original images, the image being a high-frequency area interpolated image, based on a change in position of the high-frequency area along with an elapse of time on the time series and on each of the plurality of original images; and a combination unit to execute combining processing to combine the normal interpolated image and the high-frequency area interpolated image.
    Type: Application
    Filed: December 10, 2013
    Publication date: June 26, 2014
    Applicant: Sony Corporation
    Inventors: Shigeo Fujishiro, Yoshito Suzuki, Eiji Ozeki, Kazuhiro Takahashi, Takayoshi Fujiwara
  • Patent number: 7529432
    Abstract: A data processing apparatus for converting discrete original image data into interpolated image data having a different number of sampling data from the original image data, including generating means for generating a plurality of the interpolated image data from the original image data, first virtualizing means for generating first virtual data including a virtual succession of the original image data, second virtualizing means for generating second virtual data including a virtual succession of each of the plural interpolated image data, error calculating means for calculating error between each of the second virtual data with respect to the plural interpolated image data and the first virtual data, and selecting means for selecting either one of the plural interpolated image data based on the error.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: May 5, 2009
    Assignee: Sony Corporation
    Inventors: Shigeo Fujishiro, Ikuo Someya
  • Patent number: 7224846
    Abstract: An bit-plane coding pass generator is provided in which for SP-pass processing quantization coefficient of each code block divided into bit planes, “significant (S)” or “non-significant (N)” data in a predetermined area and those around the area and compared with an S/N matching pattern. The S/N matching pattern has been set when a jump can be made from an arbitrary sample point to a next sample point to be processed by SP pass. The jump is made to the next sample point to be processed by SP pass according to a jump address value obtained from a pattern coincident with a current S/N matching pattern. Thus, by reducing the time for the significant propagation (SP) pass defined in JPEG-2000, a code block can be coded at a higher speed by three coding passes.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: May 29, 2007
    Assignee: Sony Corporation
    Inventors: Shigeo Fujishiro, Takuya Kitamura
  • Publication number: 20050144540
    Abstract: Disclosed herein is a data processing apparatus for converting discrete first data into second data having a different number of sampling data from the first data, including generating means for generating a plurality of the second data from the first data, first virtualizing means for generating first virtual data including a virtual succession of the first data, second virtualizing means for generating second virtual data including a virtual succession of each of the plural second data, error calculating means for calculating an error between each of the second virtual data with respect to the plural second data and the first virtual data, and selecting means for selecting either one of the plural second data based on the error.
    Type: Application
    Filed: October 21, 2004
    Publication date: June 30, 2005
    Inventors: Shigeo Fujishiro, Ikuo Someya
  • Publication number: 20040228539
    Abstract: An bit-plane coding pass generator is provided in which for SP-pass processing quantization coefficient of each code block divided into bit planes, “significant (S)” or “non-significant (N)” data in a predetermined area and those around the area and compared with an S/N matching pattern. The S/N matching pattern has been set when a jump can be made from an arbitrary sample point to a next sample point to be processed by SP pass. The jump is made to the next sample point to be processed by SP pass according to a jump address value obtained from a pattern coincident with a current S/N matching pattern. Thus, by reducing the time for the significant propagation (SP) pass defined in JPEG-2000, a code block can be coded at a higher speed by three coding passes.
    Type: Application
    Filed: July 24, 2003
    Publication date: November 18, 2004
    Applicant: Sony Corporation
    Inventors: Shigeo Fujishiro, Takuya Kitamura
  • Publication number: 20020176503
    Abstract: A converter partially removes frames of a sequentially scanning image data input to the converter. The resultant data is output to a preprocessing circuit. As a result, the sequentially scanning image data with a frame rate of 60 frames/sec is converted to image data with a frame rate of 30 frames/sec. A prediction error generator 102 calculates prediction error data and outputs the result to a DCT circuit. The DCT circuit performs DCT processing on the prediction error data supplied from the prediction error generator thereby producing DCT coefficients. The obtained DCT coefficients are supplied to a quantizer. The quantizer quantizes the DCT coefficients supplied from the DCT circuit thereby producing quantized data. The quantized data output from the quantizer is supplied to a variable length encoder and a dequantizer.
    Type: Application
    Filed: September 8, 1999
    Publication date: November 28, 2002
    Inventors: OSAMU MATSUNAGA, SHIGEO FUJISHIRO
  • Patent number: 6480544
    Abstract: In an encoding apparatus for processing a video signal with a signal processing circuit, producing coefficient data by an orthogonal transform of differential data obtained by motion compensation, generating coded data by quantization of the coefficient data and converting the quantization step size at the time of the quantization according to the amount of generated data of the coded data, the signal processing circuit includes: a motion vector detecting circuit for detecting a motion vector of the video signal; a motion code vector amount detecting circuit for calculating the code amount of the motion vector on the basis of the motion vector and for detecting the amount of code of the coefficient data; and a pixel number converting circuit for converting the number of pixels of the video signal according to the amount of code of the motion vector and the amount of code of the coefficient data.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: November 12, 2002
    Assignee: Sony Corporation
    Inventors: Kenji Uehara, Yoshihiro Murakami, Shigeto Funado, Osamu Matsunaga, Shigeo Fujishiro
  • Patent number: 6269123
    Abstract: A video encoder for reducing the deterioration of picture quality of a compress coded video signal by implementing a method for deciding the number of picture elements needed to properly encode an inputted video signal. The decision is calculated based on the difficulty of compressing the inputted video signal and the number of picture elements needed to accurately reproduce a compressed inputted video signal. The decision circuitry decides the number of picture elements needed for compression of the inputted video signal allowing the number of codes generated in the encoding process to be decreased and quantization accuracy improved. The main advantage is a reduction in deterioration of the video signal usually found when reproducing a compress coded video signal.
    Type: Grant
    Filed: February 10, 1999
    Date of Patent: July 31, 2001
    Assignee: Sony Corporation
    Inventors: Shigeo Fujishiro, Osamu Matsunaga
  • Patent number: 5528313
    Abstract: A motion detection signal delivered from a mixer is output through a series circuit of a maximum value calculation portion and a minimum value calculation portion. In each of the calculation portions, calculation is performed within a block of 3-dot.times.3-line. Missing of motion detection is prevented from occurring in the maximum value calculation portion because the motion detection signal of the pixel under attention is calculated therein with the values within the block and, accordingly, the motion detection signal is expanded in the horizontal and vertical directions. A detection spread to a still picture portion occurring in the calculation portion is suppressed in the minimum value calculation portion because, when surrounding motion detection signals therein are lower than the motion detection signal of the pixel under attention, the motion detection signal of the pixel under attention is replaced with the lower value.
    Type: Grant
    Filed: December 22, 1992
    Date of Patent: June 18, 1996
    Assignee: Sony Corporation
    Inventors: Yutaka Tanaka, Shigeo Fujishiro