Patents by Inventor Shigeo Furuta
Shigeo Furuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9236569Abstract: A storage element includes a first electrode and a second electrode separated by a gap and a dielectric layer provided between the first electrode and the second electrode to fill the gap. A separation distance of the gap changes in response to application of a voltage to a space between the first electrode and the second electrode, such that a switching phenomenon is produced which switches a resistance state between the first electrode and the second electrode between a high resistance state in which it is difficult for tunnel current to flow and a low resistance state in which it is easy for tunnel current to flow.Type: GrantFiled: October 28, 2014Date of Patent: January 12, 2016Assignee: Funai Electric Co., Ltd.Inventors: Shigeo Furuta, Yuichiro Masuda, Tsuyoshi Takahashi, Masatoshi Ono, Yutaka Hayashi, Taro Itaya, Yasuhisa Naitoh, Tetsuo Shimizu
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Patent number: 9190145Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.Type: GrantFiled: August 25, 2011Date of Patent: November 17, 2015Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
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Patent number: 9135990Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.Type: GrantFiled: August 25, 2011Date of Patent: September 15, 2015Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
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Patent number: 9130159Abstract: Disclosed is a fabrication method of an element with nanogap electrodes including a first electrode, a second electrode provided above the first electrode, and a gap provided between the first electrode and the second electrode, the gap being in an order of nanometer to allow resistive state to be switched by applying a predetermined voltage between the first electrode and the second electrode, the method comprising: forming the first electrode; forming a spacer on an upper surface of the first electrode; forming the second electrode in contact with an upper surface of the spacer; and removing the spacer to form the gap.Type: GrantFiled: April 8, 2010Date of Patent: September 8, 2015Assignee: Funai Electric Co., Ltd.Inventors: Shigeo Furuta, Touru Sumiya, Yuichiro Masuda, Tsuyoshi Takahashi, Yutaka Hayashi, Masatoshi Ono
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Publication number: 20150123069Abstract: A storage element includes a first electrode and a second electrode separated by a gap and a dielectric layer provided between the first electrode and the second electrode to fill the gap. A separation distance of the gap changes in response to application of a voltage to a space between the first electrode and the second electrode, such that a switching phenomenon is produced which switches a resistance state between the first electrode and the second electrode between a high resistance state in which it is difficult for tunnel current to flow and a low resistance state in which it is easy for tunnel current to flow.Type: ApplicationFiled: October 28, 2014Publication date: May 7, 2015Inventors: Shigeo FURUTA, Yuichiro MASUDA, Tsuyoshi TAKAHASHI, Masatoshi ONO, Yutaka HAYASHI, Taro ITAYA, Yasuhisa NAITOH, Tetsuo SHIMIZU
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Patent number: 8653912Abstract: There is provided a switching element which facilitates integration with higher density and lamination in a device, the switching element including: an insulating substrate; a first electrode provided on the insulating substrate; a second electrode provided above the first electrode; and a between-electrode gap section provided between the first electrode and the second electrode and including a nanometer-scale gap for causing a switching phenomenon of a resistor by applying a prescribed voltage between the first electrode and the second electrode.Type: GrantFiled: June 13, 2008Date of Patent: February 18, 2014Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.Inventors: Shigeo Furuta, Tsuyoshi Takahashi, Masatoshi Ono, Yasuhisa Naitoh, Tetsuo Shimizu
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Publication number: 20130170285Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.Type: ApplicationFiled: August 25, 2011Publication date: July 4, 2013Applicants: National Institute of Advance Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
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Publication number: 20130155757Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.Type: ApplicationFiled: August 25, 2011Publication date: June 20, 2013Applicants: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
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Patent number: 8395185Abstract: A switching element comprising: an insulative substrate; a first electrode and a second electrode provided on one surface of the insulative substrate; and an interelectrode gap which is provided between the first electrode and the second electrode, and which has a gap on the order of nanometers in which switching phenomenon of resistance occurs by applying predetermined voltage between the first electrode and the second electrode, wherein the one surface of the insulative substrate contains nitrogen.Type: GrantFiled: June 17, 2008Date of Patent: March 12, 2013Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.Inventors: Shigeo Furuta, Yuichiro Masuda, Tsuyoshi Takahashi, Masatoshi Ono, Yasuhisa Naitoh, Masayo Horikawa, Tetsuo Shimizu
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Patent number: 8391046Abstract: Disclosed is a memory cell array including: word lines and first and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and a switching element formed inside a contact hole, the switching element includes first and second conductive layers and a gap in which a resistance value is changed by applying a predetermined voltage, each word line is connected to a gate electrode, each first bit line is connected to a second electrode, each second bit line is connected to the second conductive layer, and data is written by supplying a write voltage to the first bit line connected to the selected memory cell and specifying the word line connected to the memory cell, and data is read by supplying a read voltage to the first bit lines connected to the memory cell and specifying the word line connected to the memory cells.Type: GrantFiled: December 22, 2009Date of Patent: March 5, 2013Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Shigeo Furuta, Yuichiro Masuda, Masatoshi Ono
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Patent number: 8174871Abstract: Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the word line, and specifying the first bit line to supply a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the voltage of the word line becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.Type: GrantFiled: December 22, 2009Date of Patent: May 8, 2012Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Yutaka Hayashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono
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Patent number: 8094484Abstract: Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the first bit line to connect it to the sense amplifier, specifying the word line and supplying a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the word line voltage becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.Type: GrantFiled: December 22, 2009Date of Patent: January 10, 2012Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Yutaka Hayashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono
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Patent number: 8093518Abstract: A switching element 100 includes an insulating substrate 10, a first electrode 20 provided on the insulating substrate 10, a second electrode 30 provided on the insulating substrate 10, and an interelectrode gap 40 provided between the first electrode 20 and the second electrode 30, a distance G between the first electrode 20 and the second electrode 30 being 0 nm<G?50 nm.Type: GrantFiled: September 25, 2006Date of Patent: January 10, 2012Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Advanced Applied Technology Research Institute, Inc.Inventors: Yasuhisa Naitoh, Masayo Horikawa, Hidekazu Abe, Tetsuo Shimizu, Wataru Mizutani, Shigeo Furuta, Masatoshi Ono, Tsuyoshi Takahashi
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Patent number: 8045359Abstract: Disclosed is a switching element including: an insulative substrate; a first electrode and a second electrode provided to the insulative substrate; an interelectrode gap between the first electrode and the second electrode, comprising a gap of a nanometer order which causes switching phenomenon of resistance by applying a predetermined voltage between the first electrode and the second electrode; and a sealing member to seal the interelectrode gap such that the gap is retained.Type: GrantFiled: August 20, 2008Date of Patent: October 25, 2011Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Shigeo Furuta, Tsuyoshi Takahashi, Masatoshi Ono
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Patent number: 7990751Abstract: A nanogap switching element is equipped with an inter-electrode gap portion including a gap of a nanometer order between a first electrode and a second electrode. A switching phenomenon is caused in the inter-electrode gap portion by applying a voltage between the first and second electrodes. The nanogap switching element is shifted from its low resistance state to its high resistance state by receiving a voltage pulse application of a first voltage value, and shifted from its high resistance state to its low resistance state by receiving a voltage pulse application of a second voltage value lower than the first voltage value. When the nanogap switching element is shifted from the high resistance state to the low resistance state, a voltage pulse of an intermediate voltage value between the first and second voltage values is applied thereto before the voltage pulse application of the second voltage value thereto.Type: GrantFiled: December 18, 2008Date of Patent: August 2, 2011Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.Inventors: Yuichiro Masuda, Shigeo Furuta, Tsuyoshi Takahashi, Tetsuo Shimizu, Yasuhisa Naitoh, Masayo Horikawa
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Publication number: 20110108399Abstract: There is provided a switching element which facilitates integration with higher density and lamination in a device, the switching element including: an insulating substrate; a first electrode provided on the insulating substrate; a second electrode provided above the first electrode; and a between-electrode gap section provided between the first electrode and the second electrode and including a nanometer-scale gap for causing a switching phenomenon of a resistor by applying a prescribed voltage between the first electrode and the second electrode.Type: ApplicationFiled: June 13, 2008Publication date: May 12, 2011Inventors: Shigeo Furuta, Tsuyoshi Takahashi, Masatoshi Ono, Yasuhisa Naitoh, Tetsuo Shimizu
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Publication number: 20100257726Abstract: Disclosed is a fabrication method of an element with nanogap electrodes including a first electrode, a second electrode provided above the first electrode, and a gap provided between the first electrode and the second electrode, the gap being in an order of nanometer to allow resistive state to be switched by applying a predetermined voltage between the first electrode and the second electrode, the method comprising: forming the first electrode; forming a spacer on an upper surface of the first electrode; forming the second electrode in contact with an upper surface of the spacer; and removing the spacer to form the gap.Type: ApplicationFiled: April 8, 2010Publication date: October 14, 2010Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Shigeo FURUTA, Touru Sumiya, Yuichiro Masuda, Tsuyoshi Takahashi, Yutaka Hayashi, Masatoshi Ono
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Publication number: 20100165694Abstract: Disclosed is a memory cell array including: word lines and first and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and a switching element formed inside a contact hole, the switching element includes first and second conductive layers and a gap in which a resistance value is changed by applying a predetermined voltage, each word line is connected to a gate electrode, each first bit line is connected to a second electrode, each second bit line is connected to the second conductive layer, and data is written by supplying a write voltage to the first bit line connected to the selected memory cell and specifying the word line connected to the memory cell, and data is read by supplying a read voltage to the first bit lines connected to the memory cell and specifying the word line connected to the memory cells.Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Tsuyoshi TAKAHASHI, Shigeo Furuta, Yuichiro Masuda, Masatoshi Ono
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Publication number: 20100165695Abstract: Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the first bit line to connect it to the sense amplifier, specifying the word line and supplying a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the word line voltage becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Applicants: Funai Electric Advanced Applied, Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Yutaka Hayashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono
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Publication number: 20100165696Abstract: Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the word line, and specifying the first bit line to supply a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the voltage of the word line becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.Inventors: Tsuyoshi Takahashi, Yutaka Hayashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono