Patents by Inventor Shigeo Hamamura

Shigeo Hamamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11221551
    Abstract: Flicker in a projector using a plurality of phosphor wheels is reduced. The light source device according to the present invention includes a first rotating body and a second rotating body that each include a phosphor; and a rotation body controller that rotates the first rotating body and the second rotating body so that a difference between a maximum value and a minimum value of combined light of first fluorescence obtained by the first rotating body and second fluorescence obtained by the second rotating body becomes smaller.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: January 11, 2022
    Assignee: SHARP NEC DISPLAY SOLUTIONS, LTD.
    Inventor: Shigeo Hamamura
  • Patent number: 10725364
    Abstract: A projector has: a plurality of light sources, a plurality of phosphor wheels to which are affixed a plurality of arc-shaped segments of phosphor that takes as excitation light the light from the light sources to emit light, a synthesizing optical system that synthesizes light emitted by the plurality of phosphor wheels, and a phosphor rotation control unit that controls the rotation of the plurality of phosphor wheels such that the timing at which the quantity of light emitted by the phosphor wheels becomes a minimum value differs for each of the plurality of phosphor wheels.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: July 28, 2020
    Assignee: NEC DISPLAY SOLUTIONS, LTD.
    Inventor: Shigeo Hamamura
  • Publication number: 20200233288
    Abstract: Flicker in a projector using a plurality of phosphor wheels is reduced. The light source device according to the present invention includes a first rotating body and a second rotating body that each include a phosphor; and a rotation body controller that rotates the first rotating body and the second rotating body so that a difference between a maximum value and a minimum value of combined light of first fluorescence obtained by the first rotating body and second fluorescence obtained by the second rotating body becomes smaller.
    Type: Application
    Filed: August 23, 2017
    Publication date: July 23, 2020
    Inventor: Shigeo HAMAMURA
  • Publication number: 20190018309
    Abstract: A projector has: a plurality of light sources, a plurality of phosphor wheels to which are affixed a plurality of arc-shaped segments of phosphor that takes as excitation light the light from the light sources to emit light, a synthesizing optical system that synthesizes light emitted by the plurality of phosphor wheels, and a phosphor rotation control unit that controls the rotation of the plurality of phosphor wheels such that the timing at which the quantity of light emitted by the phosphor wheels becomes a minimum value differs for each of the plurality of phosphor wheels.
    Type: Application
    Filed: August 31, 2016
    Publication date: January 17, 2019
    Inventor: Shigeo HAMAMURA
  • Patent number: 9247231
    Abstract: In 3D display, when double the frequency of the input clock exceeds the maximum rate of transmission to cinema display circuit 104, the multiply ratio of the clock is lowered from 2× multiplication and the output horizontal total clock number is reduced accordingly.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: January 26, 2016
    Assignee: NEC DISPLAY SOLUTIONS, LTD.
    Inventor: Shigeo Hamamura
  • Publication number: 20150002822
    Abstract: A projector has a light modulating device that uses laser beams as display image light and includes a marker plate that is located on a non-reflection surface of a mirror that reflects the laser beams to the light modulating device, the marker plate being excited by the laser beams and generating fluorescence having a wavelength different from that of the laser beams.
    Type: Application
    Filed: March 8, 2012
    Publication date: January 1, 2015
    Inventor: Shigeo Hamamura
  • Patent number: 8913196
    Abstract: A video processing device includes: a deserializer that both converts a serial digital interface signal received as input to parallel data and extracts a clock; format detection means that both detects a video data format that is included in the parallel data that were converted by the deserializer and supplies clock ratio information that indicates the ratio of the clock frequency and the pixel clock frequency stipulated by the format; pixel clock generation means that generates a pixel clock based on the clock that was extracted by the deserializer; saving means that saves video data and supplies the saved video data in synchronization with the pixel clock; write control means that, based on the clock ratio information, divides the video data that are contained in the parallel data that were converted by the deserializer into two or four portions and saves the divided data in the saving means; and an unpack processor that, synchronized with the pixel clock, subjects the data that are supplied from the savin
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 16, 2014
    Assignee: NEC Display Solutions, Ltd.
    Inventor: Shigeo Hamamura
  • Publication number: 20140226064
    Abstract: A video processing device includes: a deserializer that both converts a serial digital interface signal received as input to parallel data and extracts a clock; format detection means that both detects a video data format that is included in the parallel data that were converted by the deserializer and supplies clock ratio information that indicates the ratio of the clock frequency and the pixel clock frequency stipulated by the format; pixel clock generation means that generates a pixel clock based on the clock that was extracted by the deserializer; saving means that saves video data and supplies the saved video data in synchronization with the pixel clock; write control means that, based on the clock ratio information, divides the video data that are contained in the parallel data that were converted by the deserializer into two or four portions and saves the divided data in the saving means; and an unpack processor that, synchronized with the pixel clock, subjects the data that are supplied from the savin
    Type: Application
    Filed: September 22, 2012
    Publication date: August 14, 2014
    Applicant: NEC DISPLAY SOLUTIONS, LTD.
    Inventor: Shigeo Hamamura
  • Publication number: 20140146138
    Abstract: In 3D display, when double the frequency of the input clock exceeds the maximum rate of transmission to cinema display circuit 104, the multiply ratio of the clock is lowered from 2× multiplication and the output horizontal total clock number is reduced accordingly.
    Type: Application
    Filed: August 29, 2011
    Publication date: May 29, 2014
    Applicant: NEC Display Solutions, Ltd.
    Inventor: Shigeo Hamamura