Patents by Inventor Shigeo Handa

Shigeo Handa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170155522
    Abstract: There is provided a communication apparatus of a plurality of communication apparatuses forming a ring network, the communication apparatus includes: a transmitter configured to transmit a multicast packet to a first communication apparatus of the plurality of communication apparatuses; a receiver configured to receive data of a reception failure of the multicast packet from the first communication apparatus; and a transmission controller configured to stop transmitting of the multicast packet from the transmitter according to the data of the reception failure.
    Type: Application
    Filed: November 10, 2016
    Publication date: June 1, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Fukaya, YUTAKA HAYAMA, NOBUYUKI FUKUCHI, HIROYUKI SUZUKI, SHIGEO HANDA, Koji Suda, TAKANOBU WAKABAYASHI, TOSHIYUKI SAKAMOTO
  • Publication number: 20150281121
    Abstract: A transmitter includes an allocating unit, a determining unit and a control unit. The allocating unit allocates, based on priorities of a first signal and a second signal received by a single port in the transmitter, a band of the port to a signal having a higher priority. The determining unit determines whether a local port in the transmitter or a destination of the local port uses the first signal as a standby signal in a redundant configuration. The control unit changes, when the determining unit determines that the local port or the destination uses the first signal as the standby signal, the priority of the second signal received by the local port such that the priority of the second signal is higher than the priority of the first signal.
    Type: Application
    Filed: February 27, 2015
    Publication date: October 1, 2015
    Inventors: Hiroshi Fukaya, SHIGEO HANDA, TOSHIYUKI SAKAMOTO
  • Patent number: 8407494
    Abstract: When a reception of a data signal is detected, a power supply control start signal is generated and the data signal is outputted to a signal processor in a fixed time. A power supply control signal for suppressing an output voltage variation of a power supply of the signal processor is generated until a processing completion signal from the signal processor is received after the power supply control start signal is generated. Alternatively, data signals received are separated by type and outputted to respective signal processors. After validity setting signals by type are received, a power supply control start signal is generated when the validity setting signals become valid in an overlapped manner. Such a power supply control signal is generated until one of the validity setting signals which have been valid so far becomes invalid after the power supply control start signal is generated.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: March 26, 2013
    Assignee: Fujitsu Limited
    Inventors: Shigeo Handa, Yasushi Tateno
  • Publication number: 20100257387
    Abstract: When a reception of a data signal is detected, a power supply control start signal is generated and the data signal is outputted to a signal processor in a fixed time. A power supply control signal for suppressing an output voltage variation of a power supply of the signal processor is generated until a processing completion signal from the signal processor is received after the power supply control start signal is generated. Alternatively, data signals received are separated by type and outputted to respective signal processors. After validity setting signals by type are received, a power supply control start signal is generated when the validity setting signals become valid in an overlapped manner. Such a power supply control signal is generated until one of the validity setting signals which have been valid so far becomes invalid after the power supply control start signal is generated.
    Type: Application
    Filed: June 18, 2010
    Publication date: October 7, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo HANDA, Yasushi Tateno
  • Patent number: 6754172
    Abstract: A non-interruptive protection switching device which performs protection switching in a more efficient and robust way. The device has a working-channel signal storage unit to store data signals received through a working channel. Multiframe synchronization timings are detected by a working-channel multiframe synchronization controller, which provides a working-channel multiframe sync detection pulse signal when the main signals are in a normal condition and stops it when the channel is disrupted. A working-channel write controller controls every write access to the working-channel signal storage unit, generating a write pulse signal therefor. The working-channel write controller also produces working-channel write phase data by identifying a phase difference of the detected multiframe synchronization timing with respect to a reference phase signal.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: June 22, 2004
    Assignee: Fujitsu Limited
    Inventors: Masayuki Tanaka, Masaki Kubo, Satoshi Nemoto, Shuji Sakakura, Shigeo Handa, Yuji Kamura