Abstract: A stator includes a first stator member and a second stator member. The first stator member includes a plurality of first stator blades disposed at intervals in a circumferential direction. The second stator member includes a plurality of second stator blades disposed at intervals in the circumferential direction. The second stator member is fixed to the first stator member. The plurality of respective first stator blades and the plurality of respective second stator blades are aligned in the circumferential direction. At least a pair of the first and second stator blades disposed adjacently to each other in the circumferential direction partially overlaps as seen in an axial direction.

Abstract: A stator includes a stator body member and a fixing member. The stator body member includes a first disc part, a plurality of first stator blades and a first ratchet portion. The plurality of first stator blades extend outward from the first disc part in a radial direction. The first ratchet portion is provided on a principal surface of the first disc part so as to extend in a circumferential direction. The fixing member is disposed in a non-rotatable state, and includes a second disc part and a second ratchet portion. The second ratchet portion is provided on a principal surface of the second disc part so as to extend in the circumferential direction, and is configured to be engaged with the first ratchet portion.

Abstract: Apparatus for measuring a hysteresis characteristic of magnetic material, dielectric material or the like in a high frequency range without using a high-speed A/D converter. A current having a predetermined frequency is applied to an object being examined 4 and the magnetic field and magnetic flux density in the object 4 are detected. The detection signals are successively subjected to frequency conversion with predetermined frequencies corresponding to a fundamental wave and harmonic waves by mixers 17, 18. The frequency-converted signals are input to bandpass filters 19, 20. The output signals of the bandpass filters, which are signals of an intermediate frequency, are converted to digital signals by A/D converters 25, 26, the apparatus thereby detecting the fundamental wave component and each higher harmonic component.

Abstract: To detect a memory protection violation at high speed in a data processor for executing microinstructions, plural memory protection information of a descriptor of a new segment program are simultaneously discriminated true or false on the basis of current privilege level and branch condition information of a memory protection branch microinstruction. If discriminated true, the succeeding microinstruction is selected. If false, the current microinstruction is branched to a designated branch address included in the branch microinstruction. The apparatus comprises, an attribute information register for storing plural memory protection information of a new decriptor; a current privilege level register; a privilege level comparator; a microinstruction register for storing a memory protection branch microinstruction including plural branch condition information and a branch address; a memory protection violation detector having AND gates, inverters, and an OR gate; and a read address selector having an adder, etc.

Abstract: In the conventional CPU, when an interruption occurs during execution of a stack control instruction, the interrupted stack control instruction is executed again beginning from the start, so that a stack memory address currently designated by the stack pointer does not match that corresponding to the start of the instruction execution, thus resulting in a program error. To overcome the above problem, at the start of information saving and/or return operation, a stack memory address stored in the first register so as to be read next is additionally stored in the second register. Although the above operation is executed on the basis of the stack memory address stored in the first register, in case an interrupt occurs, the stack memory address stored in the second register is set to the first register before executing again the interrupted stack control instruction.

Abstract: Computers are formed with different architecture to attain optimum functions or performances according to the usage and objects. For standardization of processors for implementing predetermined operations in accordance with instuctions supplied from an external device of a computer, an interpretation section for converting instructions supplied from the external device into internal instructions is so configured that the conversion method can be modified according to other computers of different architectures. For instance, when bit composition of the external instructions differs, a decode logic in the interpretation section is so configured as to be modified according to change in the bit composition. Further, when function of the external instruction differs, a microprogram storage section is so configured as to be modified according to change in the instruction function.

Abstract: An integrated circuit device includes a data processing unit (CPU), a first read only memory (ROM) storing an applications program to be executed in the CPU, a second ROM having an address space which is addressed in common with the first ROM and storing a test program for a function diagnosis, and a test control unit. The test control unit is responsive to a test control signal externally applied in a test mode to couple the second ROM to the CPU so that the test program for setting an initial condition is executed. During the execution of the test program, the first ROM is coupled to the CPU, thereby executing applications program instructions the contents and the number of which are externally designated. Thereafter, the second ROM is coupled to the CPU so as to execute the test program for deciding a test complete condition. The execution result of the applications program instructions are compared with expected values to decide if the integrated circuit device functions normally.