Patents by Inventor Shigeo Masai

Shigeo Masai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200049768
    Abstract: A relay welding detection device includes a voltage generator, first and second resistor strings, and a relay welding detector. A first relay is disposed on a first wiring line connecting a load to a first terminal of a direct-current power supply of a vehicle, and a second relay is disposed on a second wiring line connecting the load to a second terminal of the direct-current power supply. The first resistor string is connected in series to the first terminal of the direct-current power supply and the voltage generator therebetween, and the second resistor string is connected in series to the second terminal of the direct-current power supply and the voltage generator therebetween. The relay welding detector detects a potential at a connection point of two resistors of each of the first and second resistor strings to detect presence or absence of welding in the first relay and the second relay.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: KOJI MATSUKAWA, TAKASHI NAKAZAWA, SHIGEO MASAI
  • Patent number: 8309927
    Abstract: An infrared detector includes a pyroelectric element, a first amplifier, and a second amplifier. The pyroelectric element includes a first electrode formed on a first surface of a pyroelectric body, and a second electrode formed on the opposite surface. The first amplifier is connected to the first electrode, and amplifies signals induced to the first electrode. The second amplifier is connected to the second electrode, and amplifies signals induced to the second electrode.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: November 13, 2012
    Assignee: Panasonic Corporation
    Inventors: Norio Kimura, Shigeo Masai, Yasuhiro Nakanosai
  • Publication number: 20120076322
    Abstract: There is provided a microphone that can suppress vibration noise stemming from mechanical vibrations and that outputs a collective signal having superior quality. There is provided a microphone comprising a first capacitance section M1 having a first movable electrode 101 and a second electrode 102 disposed opposite the first electrode 101 and a second capacitance section M2 that has a first movable electrode 111 and a second electrode 112 disposed opposite the first electrode 111; a first amplifier 201 that amplifies a signal from the first electrode 101 of the first capacitance section M1 and a signal from the second electrode 112 of the second capacitance section M2; and a second amplifier 202 that amplifies a signal from the second electrode 102 of the first capacitance section M1 and a signal from the first electrode 111 of the second capacitance section M2.
    Type: Application
    Filed: December 5, 2011
    Publication date: March 29, 2012
    Applicants: NGB Corporation, Panasonic Corporation
    Inventors: Norio Kimura, Shigeo Masai, Yasuhiro Nakanosai
  • Publication number: 20120014541
    Abstract: An amplifying device for a condenser-microphone according to the present invention includes: a differential amplifier (20) having an inverting input terminal (1) to which a sound pressure signal output from a condenser microphone (21) is input and a non-inverting input terminal (2) to which a dc bias voltage is applied; a capacitor (24) connected between an output terminal (3) of the differential amplifier (20) and the inverting input terminal (1) of the differential amplifier (20); a resistive element (23) connected, in parallel with the capacitor (24), between the output terminal (3) of the differential amplifier (20) and the inverting input terminal (1) of the differential amplifier (20); and an ESD protecting element (25) having bidirectional diode characteristics, the ESD protecting element (25) being connected, in parallel with the capacitor (24), between the output terminal (3) of the differential amplifier (20) and the inverting input terminal (1) of the differential amplifier (20).
    Type: Application
    Filed: September 3, 2010
    Publication date: January 19, 2012
    Inventors: Kazuya Nakayama, Shigeo Masai
  • Publication number: 20110260788
    Abstract: A first low-pass filter circuit includes a first input terminal which receives a sensor signal, a second input terminal, and an output terminal which outputs a first output signal. A second low-pass filter circuit includes an input terminal connected to the second input terminal of the first low-pass filter circuit, and an output terminal. A third low-pass filter circuit includes an input terminal connected to the output terminal of the second low-pass filter circuit, and an output terminal which outputs a second output signal.
    Type: Application
    Filed: July 5, 2011
    Publication date: October 27, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Fumihito INUKAI, Hitoshi KOBAYASHI, Shigeo MASAI
  • Publication number: 20110255228
    Abstract: There is provided a balance signal output type sensor producing a high quality balance signal output. There is provided a balance signal output type sensor including a capacitor unit having a first electrode serving as a movable electrode and a second electrode disposed opposite the first electrode, a first amplifier that is connected to the first electrode and that amplifies a signal from the first electrode, and a second amplifier that is connected to the second electrode and that amplifies a signal from the second electrode.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 20, 2011
    Applicant: Panasonic Corporation
    Inventors: Norio KIMURA, Shigeo Masai, Yasuhiro Nakanosai
  • Publication number: 20110095813
    Abstract: A MOS transistor including a first MOS transistor M1 to be used as a resistor; an input voltage source 1 connected to the source of the first MOS transistor for applying an input voltage Vin; and a gate voltage source 6 connected to the gate of the first MOS transistor for applying a gate voltage Vg. The gate voltage Vg and the input voltage Vin are set within a range where a gate-source voltage and source-drain voltage of the first MOS transistor cause the first MOS transistor to operate in a non-saturation region and also are set to avoid the first MOS transistor operating in an operation region with leakage current. Fluctuations of the resistance value resulting from a change in leakage current due to manufacturing variations are reduced and favorable temperature characteristics are obtained.
    Type: Application
    Filed: December 30, 2010
    Publication date: April 28, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masayuki OZASA, Shigeo MASAI, Hitoshi KOBAYASHI, Shuya YAMASAKI
  • Patent number: 7924090
    Abstract: An amplifying device for setting input impedance at several G? to several tens of G? and improving an ESD withstand current rating is provided. An ECM is connected to an input terminal 21 and frequency characteristics become flat to a voice band by high input impedance of a CMOS amplifier 20 and the input impedance is set at several G? to several tens of G? and thereby, response time after detecting a loud voice or turning on a power source of the ECM is speeded up and desired electrical characteristics are achieved. A path for releasing a surge voltage which occurs during assembly in the outside of an IC and intrudes from the input terminal 21 to a power source terminal or an earth terminal without an influence on a signal (20 Hz to 20 kHz) of a voice band entering from the input terminal 21 can be constructed by connecting a P-channel MOS transistor 27 and an N-channel MOS transistor 28 as an ESD protective element.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: April 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Noriyuki Fujita, Shigeo Masai, Masaharu Sato
  • Publication number: 20110057106
    Abstract: An infrared detector includes a pyroelectric element, a first amplifier, and a second amplifier. The pyroelectric element includes a first electrode formed on a first surface of a pyroelectric body, and a second electrode formed on the opposite surface. The first amplifier is connected to the first electrode, and amplifies signals induced to the first electrode. The second amplifier is connected to the second electrode, and amplifies signals induced to the second electrode.
    Type: Application
    Filed: April 20, 2010
    Publication date: March 10, 2011
    Inventors: Norio Kimura, Shigeo Masai, Yasuhiro Nakanosai
  • Publication number: 20100295614
    Abstract: An amplifying device for setting input impedance at several G? to several tens of G? and improving an ESD withstand current rating is provided. An ECM is connected to an input terminal 21 and frequency characteristics become flat to a voice band by high input impedance of a CMOS amplifier 20 and the input impedance is set at several G? to several tens of G? and thereby, response time after detecting a loud voice or turning on a power source of the ECM is speeded up and desired electrical characteristics are achieved. A path for releasing a surge voltage which occurs during assembly in the outside of an IC and intrudes from the input terminal 21 to a power source terminal or an earth terminal without an influence on a signal (20 Hz to 20 kHz) of a voice band entering from the input terminal 21 can be constructed by connecting a P-channel MOS transistor 27 and an N-channel MOS transistor 28 as an ESD protective element.
    Type: Application
    Filed: October 29, 2007
    Publication date: November 25, 2010
    Inventors: Noriyuki Fujita, Shigeo Masai, Masaharu Sato
  • Patent number: 7737688
    Abstract: The magnetic field detecting apparatus is provided with: a magnetic field detecting unit for outputting one of two signals having different potential levels from each other in response to a perpheral magnetic field; an energizing control unit for producing a periodic energizing control signal indicative of timing at which the magnetic field detecting unit is energized by employing a clock signal and another signal obtained by frequency-dividing, or frequency-multiplying the clock signal, and for supplying the produced energizing control signal to the magnetic field detecting unit; a first inverting unit for inverting the potential level of the output signal of the magnetic field detecting unit; and an energizing time period control unit for supplying a time period control signal to the energizing control unit, the time period control signal controlling the time period of the energizing control signal in response to the potential level of the output signal of the magnetic field detecting unit, and the potentia
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: June 15, 2010
    Assignee: Panasonic Corporation
    Inventors: Takuya Tomida, Tadata Hatanaka, Shigeo Masai
  • Publication number: 20090033324
    Abstract: The magnetic field detecting apparatus is provided with: a magnetic field detecting unit for outputting one of two signals having different potential levels from each other in response to a perpheral magnetic field; an energizing control unit for producing a periodic energizing control signal indicative of timing at which the magnetic field detecting unit is energized by employing a clock signal and another signal obtained by frequency-dividing, or frequency-multiplying the clock signal, and for supplying the produced energizing control signal to the magnetic field detecting unit; a first inverting unit for inverting the potential level of the output signal of the magnetic field detecting unit; and an energizing time period control unit for supplying a time period control signal to the energizing control unit, the time period control signal controlling the time period of the energizing control signal in response to the potential level of the output signal of the magnetic field detecting unit, and the potentia
    Type: Application
    Filed: July 30, 2008
    Publication date: February 5, 2009
    Inventors: Takuya Tomida, Tadata Hatanaka, Shigeo Masai
  • Patent number: 7369008
    Abstract: To provide a MOS varactor in which oscillation frequency variation is small and variation in a capacitance changing voltage is small, and a voltage-controlled oscillator using the MOS varactor, as a load capacitor of an oscillating circuit composed of a feedback resistor 1, an amplifier 2, and a crystal vibrator 3, a variable electrostatic capacitor, which is generated between drain/source terminals and a gate terminal of each of MOS transistors 5a and 6a each of which source and drain terminals are short-circuited, is connected. A bulk terminal of each of the MOS transistors 5a and 6a is connected to one terminal of a resistor 19, a voltage is applied to the other terminal of the resistor 19, the bulk terminal of each of the MOS transistors 5a and 6a is connected to one terminal of a capacitor 20, and the other terminal of the capacitor 20 is grounded.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: May 6, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeo Masai, Yuichi Tateyama, Takashi Otsuka, Hisato Takeuchi
  • Publication number: 20060202773
    Abstract: To provide a MOS varactor in which oscillation frequency variation is small and variation in a capacitance changing voltage is small, and a voltage-controlled oscillator using the MOS varactor, as a load capacitor of an oscillating circuit composed of a feedback resistor 1, an amplifier 2, and a crystal vibrator 3, a variable electrostatic capacitor, which is generated between drain/source terminals and a gate terminal of each of MOS transistors 5a and 6a each of which source and drain terminals are short-circuited, is connected. A bulk terminal of each of the MOS transistors 5a and 6a is connected to one terminal of a resistor 19, a voltage is applied to the other terminal of the resistor 19, the bulk terminal of each of the MOS transistors 5a and 6a is connected to one terminal of a capacitor 20, and the other terminal of the capacitor 20 is grounded.
    Type: Application
    Filed: February 27, 2006
    Publication date: September 14, 2006
    Inventors: Shigeo Masai, Yuichi Tateyama, Takashi Otsuka, Hisato Takeuchi