Patents by Inventor Shigeo Nishita

Shigeo Nishita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6231979
    Abstract: A self-bonding insulated wire has a bonding outermost layer formed from a resin composition prepared by adding at least two, but less than 10 parts by weight of a high-melting nylon resin having a melting point of 200° C. to 300° C., such as nylon 66 or 46, to 100 parts by weight of a copolyamide resin having a melting point of 105° C. to 150° C. The polyamide resin contains a lower molar ratio of terminal carboxyl groups than terminal amino groups.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: May 15, 2001
    Assignee: Kaneka Corporation
    Inventors: Seiichi Nagamine, Shigeo Nishita, Takeshi Ukawa, Kazushige Tamura
  • Patent number: 5289149
    Abstract: The present invention relates to an electron beam adjusting device which is attached around the neck of a color picture tube, a CRT display, etc., and aims at providing an electron beam adjusting device in which each pair of constituent magnets can be readily magnetized with minimal magnetization variations and which is less costly. The present invention provides an electron beam adjusting device having pairs of two-, four- and six-pole ring-shaped magnets formed of an alnico metal system bonded magnet material, which are attached around the neck of a cathode-ray tube, wherein the two-pole ring-shaped magnets and the four- and six-pole ring-shaped magnets are made of respective bonded magnet materials which are different in the alnico metal magnetic powder content.
    Type: Grant
    Filed: May 4, 1992
    Date of Patent: February 22, 1994
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Shigeo Nishita, Masatoshi Hirai
  • Patent number: 5267267
    Abstract: Clock timing is extracted from N level, multilevel codes of megabits per second data by determining a baud clock among the N-1 possible clocks synchronized to all the level cross points. A discriminator is used with a clock and if correct information is not obtained, the clock is changed.
    Type: Grant
    Filed: March 3, 1992
    Date of Patent: November 30, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tohru Kazawa, Takanori Miyamoto, Toshiroh Suzuki, Shigeo Nishita, Ichiro Masse, Takashi Morita, Souichi Yamashita
  • Patent number: 5123030
    Abstract: Clock timing is extracted from N level, multilevel codes of megabits per second data by determining a baud clock among the N-1 possible clocks synchronized to all the level cross points. A discriminator is used with a clock and if correct information is not obtained, the clock is changed.
    Type: Grant
    Filed: March 12, 1990
    Date of Patent: June 16, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Tohru Kazawa, Takanori Miyamoto, Toshiroh Suzuki, Shigeo Nishita, Ichiro Masse, Takashi Morita, Souichi Yamashita
  • Patent number: 5052022
    Abstract: A PLL circuit for generating an AC output signal synchronized with an AC input signal applied thereto with a phase offset with respect to the input signal includes, in one embodiment, a charge pump circuit capable of varying the phase offset depending on the frequency of the AC input signal. In a signal transmission network system including a plurality of nodes coupled to a signal transmission line and distanced from one another by various repeat lengths of transmission path, each node has a repeater including such PLL circuit to suppress jitter caused by individual repeat length of transmission over the transmission line and still remaining in an equalized AC signal in each node.
    Type: Grant
    Filed: July 11, 1989
    Date of Patent: September 24, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Nishita, Ryozo Yoshino, Masato Hirai
  • Patent number: 4796296
    Abstract: A CODEC including a coder and decoder to construct the subscriber's circuit of a digital telephone switching system or the like, wherein an analogue balancing circuit is provided between the output terminal of a post-filter and the input terminal of a pre-filter in order to effectively eliminate a return signal in the case of two-wire/four-wire conversion, and return signals not eliminated by the analogue balancing circuit are further eliminated by a digital balancing circuit.Especially in the present invention, the analogue balancing circuit is so constructed that its characteristics are independent of frequencies, and hence, the analogue balancing circuit and the digital balancing circuit are readily implemented as an LSI.
    Type: Grant
    Filed: May 30, 1985
    Date of Patent: January 3, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Amada, Kazuo Yamakido, Takahiko Kozaki, Shigeo Nishita, Masaru Kokubo
  • Patent number: 4787080
    Abstract: A PCM coder and decoder circuit for use in a subscriber line interface circuit of a telephone communication system has a digital balancing network for removing any echo signal. The digital balancing network is formed by series-connecting a first balancing circuit having characteristics corresponding to the fixed characteristics of a coder, decoder, etc. and a second balancing circuit having characteristics corresponding to variable characteristics of an external circuit including two-wire transmission line which is connected to the coder and decoder circuit. Thus, a replica of an echo signal is precisely produced, and the circuit configuration is simplified.
    Type: Grant
    Filed: August 8, 1986
    Date of Patent: November 22, 1988
    Assignees: Hitachi Ltd., Hitachi Micro Computer Eng. Ltd.
    Inventors: Kazuo Yamakido, Takahiko Kozaki, Shigeo Nishita, Kenichi Ohwada
  • Patent number: 4652858
    Abstract: An oversampling type digital-to-analog converter which has a light gradient overload and a high signal-to-noise ratio in spite of a comparatively low sampling frequency.In a digital-to-analog converter wherein the difference between an oversampled digital input signal and a feedback signal is taken, such differences are integrated, the integral value is quantized to obtain the feedback signal, and part of the feedback signal is used as an analog output signal; a circuit for the quantization is constructed of a circuit which converts the integral value into a digital signal smaller in the number of bits than the digital input signal, and the feedback signal is obtained by integrating the outputs of the quantization circuit by means of a digital integral circuit.
    Type: Grant
    Filed: April 16, 1986
    Date of Patent: March 24, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Kokubo, Shigeo Nishita, Kazuo Yamakido
  • Patent number: 4591827
    Abstract: Disclosed is a PCM coder-decoder having a construction such that a digital filter contained originally in the PCM coder-decoder is utilized on the time division basis in order to fold back a digital reception signal to a digital signal transmission side and thus to accomplish interruption, communication exchange between three parties, gain control, fold-over test of the PCM signal, and so forth, in addition to the coding and decoding functions inherent to the PCM coder-decoder.
    Type: Grant
    Filed: February 15, 1985
    Date of Patent: May 27, 1986
    Assignees: Hitachi, Ltd., Hitachi Micro Computer Engineering Ltd.
    Inventors: Shigeo Nishita, Kazuo Yamakido, Kenichi Ohwada
  • Patent number: 4490498
    Abstract: A resinous composition having an increased flame retardance is disclosed, which comprises (A) 10 to 60% by weight of a mixture comprising 100 parts by weight of a polyolefin resin, 20 to 60 parts by weight of a halogenated organic flame-retardant agent, 7 to 30 parts by weight of antimony trioxide and 10 to 40 parts by weight of zinc borate hydrate, and (B) 90 to 40% by weight of a magnetic body powder. The compositions are endowed with surprising glowing combustion resistance as well as superior flame combustion resistance.
    Type: Grant
    Filed: January 17, 1983
    Date of Patent: December 25, 1984
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Kenichi Yokota, Shigeo Nishita, Takashi Sakauchi