Patents by Inventor Shigeo Nishitoba
Shigeo Nishitoba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7173582Abstract: The present invention provide a display panel including a current-driven displaying elements arrayed therein, and a display device, which suppress the deterioration in the representation accuracy of grayscale levels of pixels, resulting from the variation in transistors formed within the display panel. A display panel according to the present invention is composed of a current-driven display element, a constant current control line, a constant current line, a current hold circuit, a switch circuit connected between said current-driven display element and said current hold circuit, a data line transmitting a data signal having a waveform corresponding to a grayscale level, and a control circuit provided with said data signal.Type: GrantFiled: July 31, 2003Date of Patent: February 6, 2007Assignee: NEC CorporationInventors: Shigeo Nishitoba, Kouichi Iguchi
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Publication number: 20050174307Abstract: The present invention provide a display panel including a current-driven displaying elements arrayed therein, and a display device, which suppress the deterioration in the representation accuracy of grayscale levels of pixels, resulting from the variation in transistors formed within the display panel. A display panel according to the present invention is composed of a current-driven display element, a constant current control line, a constant current line, a current hold circuit, a switch circuit connected between said current-driven display element and said current hold circuit, a data line transmitting a data signal having a waveform corresponding to a grayscale level, and a control circuit provided with said data signal.Type: ApplicationFiled: July 31, 2003Publication date: August 11, 2005Inventors: Shigeo Nishitoba, Kouichi Iguchi
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Patent number: 6882186Abstract: Each of a plurality of driving circuits constituting a constant current driving apparatus is composed of a first current mirror circuit and a second current mirror circuit. The first current mirror circuit outputs a plurality of output currents, each of which corresponds to a reference current. Accordingly, the variation in the output current can be reduced between the driving circuits adjacent to each other.Type: GrantFiled: December 27, 2001Date of Patent: April 19, 2005Assignee: NEC CorporationInventor: Shigeo Nishitoba
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Patent number: 6774877Abstract: In a current driver circuit that is applicable to an organic EL (electroluminescent) image display device, the current driver circuit is provided for reducing the influence of variation between transistors that constitute a current mirror circuit while using the current mirror circuit. In the current driver circuit, a third and fourth transistor that operate in a linear region (non-saturation region) are provided between the power supply line and the sources of a first and second transistor that constitute the current mirror circuit; whereby the influence of variations between the threshold voltages of the first and second transistors can be mitigated. The gates of the third and fourth transistors are connected to the gates of the first and second transistors, respectively.Type: GrantFiled: June 21, 2002Date of Patent: August 10, 2004Assignee: NEC CorporationInventors: Shigeo Nishitoba, Koichi Iguchi
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Patent number: 6734836Abstract: A current driving circuit includes a first terminal electrically connected to a voltage source, a second terminal grounded, a signal line through which a signal current runs, a first switch, a second switch electrically connected to the signal line and further electrically connected in series to the first switch, a third switch electrically connected to the first terminal, a memory stage converting the signal current into a voltage and stores the voltage therein, a driving transistor, a load electrically connected between a source of the driving transistor and the second terminal, and a selection line electrically connected to the first to third switches. The signal line is electrically connected to a gate of the driving transistor through the first and second switches. The memory stage is electrically connected between a gate of the driving transistor and the second terminal. The first switch is electrically connected between a drain and a gate of the driving transistor.Type: GrantFiled: October 12, 2001Date of Patent: May 11, 2004Assignee: NEC CorporationInventor: Shigeo Nishitoba
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Publication number: 20020196212Abstract: In a current driver circuit that is applicable to an organic EL (electroluminescent) image display device, the current driver circuit is provided for reducing the influence of variation between transistors that constitute a current mirror circuit while using the current mirror circuit. In the current driver circuit, a third and fourth transistor that operate in a linear region (non-saturation region) are provided between the power supply line and the sources of a first and second transistor that constitute the current mirror circuit; whereby the influence of variations between the threshold voltages of the first and second transistors can be mitigated. The gates of the third and fourth transistors are connected to the gates of the first and second transistors, respectively.Type: ApplicationFiled: June 21, 2002Publication date: December 26, 2002Applicant: NEC CORPORATIONInventors: Shigeo Nishitoba, Koichi Iguchi
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Publication number: 20020084812Abstract: Each of a plurality of driving circuits constituting a constant current driving apparatus is composed of a first current mirror circuit and a second current mirror circuit. The first current mirror circuit outputs a plurality of output currents, each of which corresponds to a reference current. Accordingly, the variation in the output current can be reduced between the driving circuits adjacent to each other.Type: ApplicationFiled: December 27, 2001Publication date: July 4, 2002Inventor: Shigeo Nishitoba
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Publication number: 20020043991Abstract: A current driving circuit includes a first terminal electrically connected to a voltage source, a second terminal grounded, a signal line through which a signal current runs, a first switch, a second switch electrically connected to the signal line and further electrically connected in series to the first switch, a third switch electrically connected to the first terminal, a memory stage converting the signal current into a voltage and stores the voltage therein, a driving transistor, a load electrically connected between a source of the driving transistor and the second terminal, and a selection line electrically connected to the first to third switches. The signal line is electrically connected to a gate of the driving transistor through the first and second switches. The memory stage is electrically connected between a gate of the driving transistor and the second terminal. The first switch is electrically connected between a drain and a gate of the driving transistor.Type: ApplicationFiled: October 12, 2001Publication date: April 18, 2002Inventor: Shigeo Nishitoba
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Patent number: 4509494Abstract: In a pulse width control circuit receiving a periodic input signal and controlling the width of an output pulse by means of a negative feedback loop, the value of power source voltage is detected and when a prescribed power source voltage is detected, the amount of the negative feedback is varied in response to the detection of the prescribed power source voltage to vary the width of the output pulse correspondingly.Type: GrantFiled: June 9, 1982Date of Patent: April 9, 1985Assignee: Nippon Electric Company, Ltd.Inventors: Shigeo Nishitoba, Hirokazu Fukaya
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Patent number: 4469082Abstract: An ignition coil control circuit compares the coil input current with a reference level, and the duty ratio of the output current is altered accordingly. The reference level is raised during cold weather operations, raising the duty ratio. Once the operating temperature of the engine rises above a predetermined level, a detector circuit activates a control signal generator which lowers the reference level received by the comparator to lower the duty ratio accordingly.Type: GrantFiled: June 14, 1982Date of Patent: September 4, 1984Assignee: Nippon Electric Co., Ltd.Inventors: Shigeo Nishitoba, Hirokazu Fukaya
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Patent number: 4013972Abstract: A gain controllable amplifier of the present invention comprises a first and a second differential amplifier. The first differential amplifier serves as an amplifier for an input signal to be impressed on emitters connected in common with each other, while the second differential amplifier serves as a base bias voltage control circuit of the first differential amplifier. The bias voltage derived from the second differential amplifier is changed by a D.C. bias voltage applied to the bases of the respective transistors in the second differential amplifier. The connected to the respective output terminals of the second differential amplifier are transistors whose bases receive a constant voltage. The gain of the first differential amplifier can be controlled by adjusting the D.C. bias voltage applied to the second differential amplifier. The present invention further comprises two current supply circuit each connected to the aforesaid respective output terminals of the second differential amplifier.Type: GrantFiled: May 3, 1976Date of Patent: March 22, 1977Assignee: Nippon Electric Company, Ltd.Inventors: Shigeo Nishitoba, Kazuo Tokuda