Patents by Inventor Shigeo Ootsuki

Shigeo Ootsuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9721773
    Abstract: This mass spectrometric device is provided with a sample container (8) for placing a measurement sample (12) therein, a detector (9) analyzing the mass of a sample and detecting a drug, or the like, in the sample, a dielectric container (3) linked to the sample container for running a discharge current into air to provoke ionization, a valve (2) for sending air intermittently to the sample container, the dielectric container and the detector, a barrier discharge high-voltage power source (6) to be discharged by the dielectric container, a current detection unit (5) connected to the barrier discharge high-voltage power source for detecting a discharge current (28), a discharge-start timing detection unit (7) connected to the current detection unit for detecting the discharge-start timing based on the current detection result from the current detection unit to send a discharge-start timing signal (17), and a control unit (11) for controlling each constituent.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: August 1, 2017
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Akio Yamamoto, Toshimitsu Watanabe, Shigeo Ootsuki, Kazuki Kajima, Toshiaki Yanokura
  • Publication number: 20160141163
    Abstract: This mass spectrometric device is provided with a sample container (8) for placing a measurement sample (12) therein, a detector (9) analyzing the mass of a sample and detecting a drug, or the like, in the sample, a dielectric container (3) linked to the sample container for running a discharge current into air to provoke ionization, a valve (2) for sending air intermittently to the sample container, the dielectric container and the detector, a barrier discharge high-voltage power source (6) to be discharged by the dielectric container, a current detection unit (5) connected to the barrier discharge high-voltage power source for detecting a discharge current (28), a discharge-start timing detection unit (7) connected to the current detection unit for detecting the discharge-start timing based on the current detection result from the current detection unit to send a discharge-start timing signal (17), and a control unit (11) for controlling each constituent.
    Type: Application
    Filed: May 30, 2014
    Publication date: May 19, 2016
    Inventors: Akio YAMAMOTO, Toshimitsu WATANABE, Shigeo OOTSUKI, Kazuki KAJIMA, Toshiaki YANOKURA
  • Patent number: 7166013
    Abstract: The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: January 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Moriyama, Yoshihiro Ishida, Takashi Kugaya, Shigeo Ootsuki, Soichi Katagiri, Sadayuki Nishimura, Ryosei Kawai, Kan Yasui
  • Patent number: 7137866
    Abstract: The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: November 21, 2006
    Assignee: Hitachi Ltd.
    Inventors: Shigeo Moriyama, Yoshihiro Ishida, Takashi Kugaya, Shigeo Ootsuki, Soichi Katagiri, Sadayuki Nishimura, Ryosei Kawai, Kan Yasui
  • Publication number: 20060057940
    Abstract: The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.
    Type: Application
    Filed: November 7, 2005
    Publication date: March 16, 2006
    Inventors: Shigeo Moriyama, Yoshihiro Ishida, Takashi Kugaya, Shigeo Ootsuki, Soichi Katagiri, Sadayuki Nishimura, Ryosei Kawai, Kan Yasui
  • Publication number: 20050095960
    Abstract: The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.
    Type: Application
    Filed: December 7, 2004
    Publication date: May 5, 2005
    Inventors: Shigeo Moriyama, Yoshihiro Ishida, Takashi Kugaya, Shigeo Ootsuki, Soichi Katagiri, Sadayuki Nishimura, Ryosei Kawai, Kan Yasui
  • Publication number: 20030199238
    Abstract: The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 23, 2003
    Inventors: Shigeo Moriyama, Yoshihiro Ishida, Takashi Kugaya, Shigeo Ootsuki, Soichi Katagiri, Sadayuki Nishimura, Ryosei Kawai, Kan Yasui
  • Patent number: 6336842
    Abstract: An object of the present invention is to provide a polishing apparatus which is capable of configuring a surface of a polishing tool without damaging the polishing tool. In order to solve the above-mentioned problem, the present invention provide a rotary machining apparatus comprising a polishing tool for polishing a sample; a rotary disk for holding the polishing tool; a tool for configuring a surface of the polishing tool; and a position adjusting mechanism for adjusting a gap between the tool and the polishing tool, which comprises a rotating mechanism for rotating the tool; and a sensor for sensing a change in the rotation of the rotating mechanism, a height at starting to configure the polishing tool using the tool being determined based on the change in the rotation obtained by the sensor.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: January 8, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Ootsuki, Shigeo Moriyama, Takashi Kugaya, Kenichi Togawa, Makoto Kajiwara, Shyuichi Oowada, Yukio Suzuki, Yoko Sugawa