Patents by Inventor Shigeo Shinada

Shigeo Shinada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5828654
    Abstract: In an input cell policing method in a network of an asynchronous transfer mode, according to information contained in a header field of each input cell, a group to which the cell belongs is identified. For each group, there are set a plurality of time frames having a predetermined length and mutually different phases to count the number of input cells in each time frame period. For each time frame, the count value of input cells is compared with a predetermined threshold value. An input cell for which the count value exceeds the threshold value in either one of the time frames is assumed to be an excess cell. The excess cell is discarded or a violation mark is added thereto.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: October 27, 1998
    Assignees: Hitachi, Ltd., Nippon Telegraph & Telephone Corp.
    Inventors: Akihiko Takase, Shigeo Shinada, Mitsuhiro Takano, Toshiya Oouchi, Naoaki Yamanaka, Youichi Sato
  • Patent number: 5465348
    Abstract: A UPC circuit fault diagnosis system for diagnosing a failure in a UPC circuit controls cell traffic volume on the basis of prescribed information about cell traffic. Failure diagnosis of a UPC circuit is provided by a usage parameter determination of at least one kind of cell, using more than one system and comparing determination results. The diagnosis system has an operating UPC circuit for controlling a total of m kinds of cells, and a standby UPC circuit for controlling a total of n kinds of cells. The system also has a total of q bridge memories for keeping a chronological record of the prescribed information of arriving cells. A fault diagnosis of the bridge memories is provided by comparing the contents of the bridge memories, using more than one system.
    Type: Grant
    Filed: January 8, 1993
    Date of Patent: November 7, 1995
    Assignee: Fujitsu Limited
    Inventors: Shigeo Amemiya, Takao Ogura, Takafumi Chujo, Hiroshi Takeo, Michio Kusayanagi, Naoaki Yamanaka, Yoichi Sato, Akihiko Takase, Shigeo Shinada, Mituhiro Takano, Kiyoshi Saitou, Kazuhiko Hohara, Tetuhiro Okabe
  • Patent number: 4993013
    Abstract: A monitor system for a multiplex equipment, comprising a multiplexing unit for multiplexing low speed group input signals of plural channels into a high speed group output signal and a demultiplexing unit for demultiplexing a high speed group input signal into low speed group output signals of plural channels, wherein the high speed group output signal and the low speed group input signals on one hand and the high speed group input signal and the low speed group output signals on the other hand are monitored through comparison on the basis of the low speed group signal. When discrepancy is detected in the comparison between the high speed group output signal and the low speed group input signal in a certain channel of the low speed group signal in the course of monitoring the multiplex unit, the comparison between the high speed input signal and the low speed output signal is performed in a different channel of the low speed group signal for monitoring the demultiplex unit.
    Type: Grant
    Filed: September 29, 1989
    Date of Patent: February 12, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Shinada, Hiroyuki Fujita