Patents by Inventor Shigeo Tanahashi
Shigeo Tanahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10444015Abstract: A sensor includes a weight body, a frame which is located so as to surround the weight body when viewed from above, a beam part which is provided with flexibility and in which a first end is connected to the weight body and a second end is connected to the frame, and a detection part which is provided on the beam part and detects deformation of the beam part as an electric signal. The beam part includes a main part in which a cross-sectional shape in a direction perpendicular to a longitudinal direction connecting the first end and the second end is a rectangular shape, and an extending part which protrudes from at least one of an upper surface or a lower surface of the main part and extends in the longitudinal direction or extends in a width direction perpendicular to the longitudinal direction when viewed from above.Type: GrantFiled: March 19, 2015Date of Patent: October 15, 2019Assignee: KYOCERA CORPORATIONInventors: Masaru Nagata, Tokuichi Yamaji, Shigeo Tanahashi
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Publication number: 20170003130Abstract: A sensor includes a weight body, a frame which is located so as to surround the weight body when viewed from above, a beam part which is provided with flexibility and in which a first end is connected to the weight body and a second end is connected to the frame, and a detection part which is provided on the beam part and detects deformation of the beam part as an electric signal. The beam part includes a main part in which a cross-sectional shape in a direction perpendicular to a longitudinal direction connecting the first end and the second end is a rectangular shape, and an extending part which protrudes from at least one of an upper surface or a lower surface of the main part and extends in the longitudinal direction or extends in a width direction perpendicular to the longitudinal direction when viewed from above.Type: ApplicationFiled: March 19, 2015Publication date: January 5, 2017Applicant: KYOCERA CorporationInventors: Masaru NAGATA, Tokuichi YAMAJI, Shigeo TANAHASHI
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Publication number: 20070285907Abstract: There is disclosed a wiring board comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.Type: ApplicationFiled: August 9, 2007Publication date: December 13, 2007Applicant: KYOCERA CORPORATIONInventors: Hiroyuki NISHIKAWA, Shigeo TANAHASHI, Katsura HAYASHI
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Patent number: 7271476Abstract: There is disclosed a wiring board comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.Type: GrantFiled: August 27, 2004Date of Patent: September 18, 2007Assignee: Kyocera CorporationInventors: Hiroyuki Nishikawa, Shigeo Tanahashi, Katsura Hayashi
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Publication number: 20050087850Abstract: There is disclosed a wiringboard comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.Type: ApplicationFiled: August 27, 2004Publication date: April 28, 2005Inventors: Hiroyuki Nishikawa, Shigeo Tanahashi, Katsura Hayashi
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Patent number: 6694069Abstract: An object of the invention is to provide an optical integrated circuit substrate capable of establishing optical connection between an optical waveguide and a semiconductor light-receiving element with high light-receiving efficiency and of achieving low-loss light transmission. In the optical integrated circuit substrate, on a substrate is formed an optical waveguide having a clad and a core layer. Embedded in the optical waveguide are a metal placement portion for an optical element and a thin-film optical element placed thereon. Distance between the thin-film optical element and the core layer is reduced. In a region free of the thin-film optical element, there is an adequate distance between the core layer and the substrate. This allows satisfactory optical connection between the thin-film optical element and the optical waveguide. In the thin-film optical element-free region, low-loss light transmission is achieved without interaction between transmitted light and the substrate.Type: GrantFiled: October 30, 2001Date of Patent: February 17, 2004Assignee: Kyocera CorporationInventors: Katsuhiro Kaneko, Shigeo Tanahashi, Tokuichi Yamaji, Shinichi Abe, Yuriko Ueno
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Patent number: 6661939Abstract: An optical module comprising: an optical element flip-chip mounted on a substrate; an optical waveguide formed on the substrate and optically connected to the optical element; and underfill resin filled in between the substrate and the optical element and covering an optical junction between the optical element and the optical waveguide, wherein the underfill resin is of an electrically insulating material and has a refractive index equal to or smaller than a refractive index of a clad portion of the optical waveguide. The optical element can be flip-chip mounted with improved mechanical and electrical mounting reliability and thus satisfactory optical connection can be maintained. Further, it never occurs that light passing through the optical waveguide leaks to the underfill resin in the optical junction between the optical waveguide and the optical element.Type: GrantFiled: September 24, 2001Date of Patent: December 9, 2003Assignee: Kyocera CorporationInventors: Katsuhiro Kaneko, Shigeo Tanahashi
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Patent number: 6438307Abstract: An optical waveguide is provided, which comprises a core part formed of optical material whose refractive index is varied corresponding to the irradiation amount of light having energy higher than that of light to be transmitted, and a cladding part formed of the optical material, but having a smaller refractive index than that of the core part by irradiation with the light having higher energy, which covers at least part of an outer periphery of the core part in the direction of the transmission of light.Type: GrantFiled: March 24, 2000Date of Patent: August 20, 2002Assignee: Kyocera CorporationInventors: Katsuhiro Kaneko, Shigeo Tanahashi
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Publication number: 20020081056Abstract: An object of the invention is to provide an optical integrated circuit substrate capable of establishing optical connection between an optical waveguide and a semiconductor light-receiving element with high light-receiving efficiency and of achieving low-loss light transmission. In the optical integrated circuit substrate, on a substrate is formed an optical waveguide having a clad and a core layer. Embedded in the optical waveguide are a metal placement portion for an optical element and a thin-film optical element placed thereon. Distance between the thin-film optical element and the core layer is reduced. In a region free of the thin-film optical element, there is an adequate distance between the core layer and the substrate. This allows satisfactory optical connection between the thin-film optical element and the optical waveguide. In the thin-film optical element-free region, low-loss light transmission is achieved without interaction between transmitted light and the substrate.Type: ApplicationFiled: October 30, 2001Publication date: June 27, 2002Applicant: KYOCERA CORPORATIONInventors: Katsuhiro Kaneko, Shigeo Tanahashi, Tokuichi Yamaji, Shinichi Abe, Yuriko Ueno
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Publication number: 20020037138Abstract: An optical module comprising: an optical element flip-chip mounted on a substrate; an optical waveguide formed on the substrate and optically connected to the optical element; and underfill resin filled in between the substrate and the optical element and covering an optical junction between the optical element and the optical waveguide, wherein the underfill resin is of an electrically insulating material and has a refractive index equal to or smaller than a refractive index of a clad portion of the optical waveguide. The optical element can be flip-chip mounted with improved mechanical and electrical mounting reliability and thus satisfactory optical connection can be maintained. Further, it never occurs that light passing through the optical waveguide leaks to the underfill resin in the optical junction between the optical waveguide and the optical element.Type: ApplicationFiled: September 24, 2001Publication date: March 28, 2002Applicant: KYOCERA CORPORATIONInventors: Katsuhiro Kaneko, Shigeo Tanahashi
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Patent number: 6184477Abstract: A multi-layer circuit substrate is designed to ensure uniform impedance characteristics for signal conductors even when such conductors are installed at a high density. The device consists of a plurality of planar insulating layers laminated together. In one embodiment a first insulating layer bears a first ground plane formed as an orthogonal grid. A second insulating layer, laminated to the first layer, bears a first set of signal wiring, the traces of which are disposed parallel to one of the orthogonal axes of the ground plane. A third insulating layer, laminated to the second layer, bears either a second ground plane formed as an orthogonal grid or a power plane formed as an orthogonal grid. A fourth insulating layer, laminated to the third layer, bears a second set of signal wiring, the traces of which are disposed parallel to the other orthogonal axis of the first ground plane.Type: GrantFiled: December 2, 1998Date of Patent: February 6, 2001Assignee: Kyocera CorporationInventor: Shigeo Tanahashi
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Patent number: 6172305Abstract: First to fourth power wiring conductors and first to fourth ground wiring conductors are arranged on first to fourth insulating layers, respectively, and a first signal wiring conductor is arranged on the first or second insulating layer and a second signal wiring conductor is arranged on the third or fourth insulating layer.Type: GrantFiled: July 29, 1998Date of Patent: January 9, 2001Assignee: Kyocera CorporationInventor: Shigeo Tanahashi
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Patent number: 6088492Abstract: An object of the invention is to provide a method of producing an optical waveguide comprising a siloxane-containing polymer film, capable of controlling a refractive index easily and finely, and an optoelectronic hybrid substrate using the optical waveguide, capable of controlling a refractive index easily and finely, and reducing the effect of the surface roughness of the substrate. In particular, it relates to a method of producing an optical waveguide comprising a siloxane-containing polymer film containing a metal obtained by the thermal polymerization of a siloxane-containing polymer film formation solution added with a metal alkoxide on a substrate, and an optoelectronic hybrid substrate comprising a combination of an optical waveguide produced as mentioned above, a photoelectric element and an electric circuit on a ceramic substrate.Type: GrantFiled: July 1, 1999Date of Patent: July 11, 2000Assignee: Kyocera CorporationInventors: Katsuhiro Kaneko, Shigeo Tanahashi
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Patent number: 6060664Abstract: A prior-art electronic circuit component comprising an insulating film and a circuit conductive layer made of a superconducting metal suffers low reliability resulting from insufficient adhesion between these layers. An electronic circuit component of the invention comprises an insulating film made of a high polymer material having a dielectric constant of 2.5 or less, a base metal layer formed of copper on the insulating film, having a thickness of 0.01 to 0.3 .mu.m, and a circuit conductive layer formed of at least one of niobium and niobium nitride on the base metal layer. The electronic circuit component of the invention can accomplish an increased adhesion between the insulating film and the circuit conductive layer.Type: GrantFiled: June 26, 1998Date of Patent: May 9, 2000Assignee: Kyocera CorporationInventors: Shigeo Tanahashi, Tokuichi Yamaji
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Patent number: 5972516Abstract: An object of the invention is to provide a method of producing an optical waveguide comprising a siloxane-containing polymer film, capable of controlling a refractive index easily and finely, and an optoelectronic hybrid substrate using the optical waveguide, capable of controlling a refractive index easily and finely, and reducing the effect of the surface roughness of the substrate. In particular, it relates to a method of producing an optical waveguide comprising a siloxane-containing polymer film containing a metal obtained by the thermal polymerization of a siloxane-containing polymer film formation solution added with a metal alkoxide on a substrate, and an optoelectronic hybrid substrate comprising a combination of an optical waveguide produced as mentioned above, a photoelectric element and an electric circuit on a ceramic substrate.Type: GrantFiled: February 27, 1997Date of Patent: October 26, 1999Assignee: Kyocera CorporationInventors: Katsuhiro Kaneko, Shigeo Tanahashi
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Patent number: 5608261Abstract: A thermally dissipative IC package which can accommodate large discrete capacitors. The package substrate incorporates a recessed region on one of its surfaces which is separate from the region in which the IC device is placed. Inside this recessed region is placed a discrete capacitor such that the entire capacitor resides below the surface of the substrate within the recessed region. Finally, a metal plate is attached to the surface of the substrate, unencumbered by the discrete capacitor.Type: GrantFiled: December 28, 1994Date of Patent: March 4, 1997Assignee: Intel CorporationInventors: Bidyut K. Bhattacharyya, Shigeo Tanahashi
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Patent number: 5607883Abstract: A thermally dissipative IC package which can accommodate large discrete capacitors. The package substrate incorporates a recessed region on one of its surfaces which is separate from the region in which the IC device is placed. Inside this recessed region is placed a discrete capacitor such that the entire capacitor resides below the surface of the substrate within the recessed region. Finally, a metal plate is attached to the surface of the substrate, unencumbered by the discrete capacitor.Type: GrantFiled: April 16, 1996Date of Patent: March 4, 1997Assignee: Intel CorporationInventors: Bidyut K. Bhattacharyya, Shigeo Tanahashi
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Patent number: 5474834Abstract: A circuit sub-assembly as a mounting for an electronic component such as Josephson device, i.e., a superconducting element, comprises a ceramic insulating substrate, an oxygen-shielding barrier layer formed on the insulating substrate, and a circuit film of niobium, as a superconducting material formed on the barrier layer according to a desired pattern. The barrier layer prevents oxidation of the circuit layer by shielding it from oxygen present in the insulating substrate. Due to the barrier layer, the circuit film is scarcely subject to superconductivity-impairing oxidation. The circuit film is thus capable of high-speed electronic signal conduction.Type: GrantFiled: June 9, 1994Date of Patent: December 12, 1995Assignee: Kyocera CorporationInventors: Shigeo Tanahashi, Takanori Kubo, Kazuhiro Kawabata
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Patent number: 5331297Abstract: An impedance-matching circuit assembly supplies a.c. power from an external a.c. source to Josephson devices. The assembly comprises resonant-line composed quarter-wave impedance conversion circuits, interconnected in a tree. The impedance-conversion circuits are assembled such that connected to the a.c. source is a circuit having a first-stage impedance, followed by two circuits having second-state impedances connected in parallel, to each of which are connected in parallel two circuits having third-stage impedances, each of which in turn is connected to supply input terminals of two of the Josephson devices.Type: GrantFiled: December 18, 1992Date of Patent: July 19, 1994Assignee: Kyocera CorporationInventors: Takanori Kubo, Shigeo Tanahashi