Patents by Inventor Shigeru Fujii

Shigeru Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4780846
    Abstract: A master slice type semiconductor circuit device including a memory block having at least one memory circuit; one conductive layer provided to peripheral portions of the memory circuit and used as an input portion thereto; power source lines provided to the peripheral portion of the memory circuit and formed by a conductive layer different from the conductive layer of the input portion; and a contact hole for connecting between the two conductive layers at a selected input portion. The selected input portion connected by the contact hole is set or clamped to a predetermined logic level by the power source line. This enables a change of the memory capacity or the function of the memory block to satisfy customer requirements.
    Type: Grant
    Filed: June 28, 1985
    Date of Patent: October 25, 1988
    Assignee: Fujitsu Limited
    Inventors: Tomoaki Tanabe, Shigeru Fujii, Yoshihisa Takayama
  • Patent number: 4727266
    Abstract: As the number of output circuit increases in LSI or VLSI circuit, there increases the chance of many large output circuits operates at a same instant, and it causes malfunction of logic by induced switching noise. In order to prevent such problem, the switching speed of driving buffer circuit for output buffer circuit is controlled. By reducing the switching capacity of the driving circuit, the switching speed of the total circuit is not affected so much, but the noise is decreased very much. The control of the switching capacity of the driving buffer circuit is performed by master slice technology. Such as perfectly opposite design concept to that of present LSI design has been proofed by experiments.
    Type: Grant
    Filed: February 24, 1987
    Date of Patent: February 23, 1988
    Assignee: Fujitsu Limited
    Inventors: Shigeru Fujii, Kouichi Yamashita, Tomoaki Tanabe, Yoshio Kuniyasu
  • Patent number: 4701777
    Abstract: A gate array type semiconductor device including at least a plurality of basic cell arrays and diffusion regions for suppressing latchup in the basic cells forming the basic cell arrays. Each of the diffusion regions has a comb-shaped structure, i.e., wide tooth parts, narrow tooth parts, and a base part, formed as an integral structure. These parts partially surround each basic cell.
    Type: Grant
    Filed: December 30, 1986
    Date of Patent: October 20, 1987
    Assignee: Fujitsu Limited
    Inventors: Yoshihisa Takayama, Shigeru Fujii, Tomoaki Tanabe
  • Patent number: 4700089
    Abstract: A delay circuit for a gate-array LSI including at least one inverter having a plurality of P-channel transistors (Q.sub.1p to Q.sub.4p) and a plurality of N-channel transistors (Q.sub.1n to Q.sub.4n) connected in series. The P-channel/N-channel transistors are driven by an input potential (IN), and the common output of the innermost pair of P-channel/N-channel transistors generates an output.
    Type: Grant
    Filed: August 20, 1985
    Date of Patent: October 13, 1987
    Assignee: Fujitsu Limited
    Inventors: Shigeru Fujii, Masanori Oozeki
  • Patent number: 4697095
    Abstract: A circuit configuration in a chip for a semiconductor device based on so-called chip-on-chip technology. The chip has a selecting circuit which switches, according to the control signals supplied thereto, an input of an internal circuit formed on the chip to connect to an output of the internal circuit or to an input terminal for receiving signals from another chip with which the chip is to be interconnected in a completed chip-on-chip structure. The control signals to operate the selecting circuit can be supplied without using large terminals to be connected to an external circuit, by simple impedance means and biasing means respectively provided for the chip and the other chip.
    Type: Grant
    Filed: October 2, 1985
    Date of Patent: September 29, 1987
    Assignee: Fujitsu Limited
    Inventor: Shigeru Fujii
  • Patent number: 4663582
    Abstract: A stator is formed with two opposed magnetic poles, and first and second magnetic paths juxtaposed to each other. An output coil and a first exciting coil are wound on the first magnetic path in such a manner as to produce respective electromagnetic forces in the same phase. A second exciting coil is wound on the second magnetic path in such a manner as to produce an electromotive force in the same phase with the electromotive force produced by the first exciting coil. The first and second exciting coils supply exciting current to a field coil wound on a rotor arranged between the opposed magnetic poles during rotation of the rotor.
    Type: Grant
    Filed: April 16, 1985
    Date of Patent: May 5, 1987
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Shigeru Fujii, Motohiro Shimizu
  • Patent number: 4661815
    Abstract: A gate array integrated device including a plurality of single column type arrays, a plurality of matrix type arrays such as double column type arrays (BC2), and longitudinal connection areas (CH) provided between the single column type arrays and the matrix type arrays. One of the single column type arrays facing at least one side of each of the matrix type arrays.
    Type: Grant
    Filed: October 2, 1985
    Date of Patent: April 28, 1987
    Assignee: Fujitsu Limited
    Inventors: Yoshihisa Takayama, Shigeru Fujii, Kazuyuki Kawauchi, Toshihiko Yoshida
  • Patent number: 4578772
    Abstract: The present invention relates to a voltage dividing circuit comprising capacitors or resistors. In the case of a voltage dividing circuit comprising capacitors, the capacitors are connected at one end to an output terminal and at the other end connected alternately to two power sources through changeover switches. The switches are selectively operated so that the capacitors divide the source voltages into fractions of the voltage. The average of the fractions of voltage is used an output voltage. The averaging of the fractions of voltage cancels out the characteristic difference among the capacitors. The fractions of voltage are changed by varying the time during which each capacitor is connected to either power source. Similarly, in the case of a voltage dividing circuit comprising resistors, the resistors divide a voltage into fractions. The average of the fractions of voltage is used as an output voltage.
    Type: Grant
    Filed: September 14, 1982
    Date of Patent: March 25, 1986
    Assignee: Fujitsu Limited
    Inventor: Shigeru Fujii
  • Patent number: 4535281
    Abstract: The present invention is directed to an automatic voltage regulating system for an electric generator comprising a detection coil for detecting the output voltage of an AC generator. The voltage regulating system includes a detection circuit comprising a rectifying circuit for rectifying the output voltage of the detection coil, a smoothing circuit coupled to the detection circuit for smoothing the output voltage and a regulating circuit coupled to the output of the smoothing circuit for shifting the voltage load thereof, wherein the regulating circuit shifts the level of the voltage in the smoothing circuit by comparing the voltage in the rectifying circuit with the predetermined voltage to control the field current during the period of the shifting of the voltage level.
    Type: Grant
    Filed: November 10, 1983
    Date of Patent: August 13, 1985
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Motohiro Shimizu, Shigeru Fujii
  • Patent number: 4490828
    Abstract: An improved electric resistance heating element made of a carbon material, provided around its surface with a layer essentially comprising carbon fiber, and an improved electric resistance heating furnace using the heating element.
    Type: Grant
    Filed: December 20, 1982
    Date of Patent: December 25, 1984
    Assignee: Toray Industries, Inc.
    Inventors: Mototada Fukuhara, Keizo Ono, Ken-ichi Morita, Shigeru Fujii
  • Patent number: 4316937
    Abstract: The present invention relates to an acrylic fiber having excellent water absorbency. The fiber has a porous core and a relatively dense skin structure. It is a blended polymer which comprises an acrylic polymer copolymerized with a synthetic polymer which is miscible but substantially incompatible therewith, and is soluble in a solvent for the acrylic polymer but is insoluble in water.
    Type: Grant
    Filed: February 8, 1980
    Date of Patent: February 23, 1982
    Assignee: Toray Industries, Inc.
    Inventors: Hiroyoshi Tanaka, Shigeru Fujii, Mitsuo Suzuki
  • Patent number: 4107129
    Abstract: An antistatic acrylic fiber having an electrical resistivity of about 10.sup.8 .OMEGA. centimeters or less. The fiber comprises (A) an acrylonitrile homopolymer or copolymer and (B) an antistatic polymer comprising a plurality of polyether segments disposed in said polymer (A), and wherein electrically conductive carbon black is dispersed in antistatic polymer (B). Preferably antistatic polymer (B) extends in the form of long and slender stripes in the polymer (A).
    Type: Grant
    Filed: February 24, 1977
    Date of Patent: August 15, 1978
    Assignee: Toray Industries, Inc.
    Inventors: Hiroyoshi Tanaka, Teruo Koseki, Shigeru Fujii
  • Patent number: 3963803
    Abstract: An acrylic fiber having excellent antistatic properties is obtained by mixing a polymer (A) consisting mainly of acrylonitrile with a copolymer (B) consisting mainly of a polyetherpolyester block copolymer consisting of a polyester and compound represented by the general formula (1): ##EQU1## (wherein each of m and n is O or a positive integer, wherein 25 .ltoreq. m + n .ltoreq. 1000, and m .gtoreq. 10).
    Type: Grant
    Filed: September 24, 1973
    Date of Patent: June 15, 1976
    Assignee: Toray Industries, Inc.
    Inventors: Hiroyoshi Tanaka, Haruo Obara, Teruo Koseki, Hajime Machida, Michihiko Tanaka, Shigeru Fujii
  • Patent number: 3941757
    Abstract: Method of producing a copolymer of cyclopentene comprising the steps of preliminarily mixing in an inert solvent a polycyclic olefin having at least one double bond in a ring, with a metallic compound containing tungsten or molybdenum as a catalyst, to form a complex compound with each other; polymerizing cyclopentene in an inert solvent in the presence of a catalyst system comprising a metallic compound of tungsten or molybdenum and an organo metallic compound of Group I-IV of the Periodic Table, and then adding the complex compound to the polymerizing cyclopentene system, thereby to produce a novel copolymer of cyclopentene.
    Type: Grant
    Filed: July 31, 1974
    Date of Patent: March 2, 1976
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Hiroshi Wakabayashi, Toru Nakagawa, Shoichi Matsumura, Shigeru Fujii