Patents by Inventor Shigeru Hirao

Shigeru Hirao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160049375
    Abstract: A semiconductor device includes a substrate which includes a first face. The device also includes a buffer layer, a semiconductor layer, source and drain electrodes, and a gate electrode. A trench is formed on the semiconductor layer so that the trench surrounds the source electrode, the drain electrode, and the gate electrode in a plan view, the trench passes through the semiconductor layer and the buffer layer, and a bottom of the trench reaches at least an inside of the substrate. A distance from the first face of the substrate to the bottom of the trench is 100 nm or more in a thickness direction of the substrate.
    Type: Application
    Filed: October 28, 2015
    Publication date: February 18, 2016
    Inventors: Ippei KUME, Takashi ONIZAWA, Takashi HASE, Shigeru HIRAO, Tadatoshi DANNO
  • Patent number: 9196731
    Abstract: Sometimes to warp a group III nitride semiconductor and a silicon by the stress of the group III nitride semiconductor acting on the silicon. A semiconductor device includes a substrate, a buffer layer, and a semiconductor layer. A trench is formed on a sixth face of the semiconductor layer. The trench passes through the semiconductor layer and the buffer layer. The bottom of the trench reaches at least the inside of the substrate.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: November 24, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Ippei Kume, Takashi Onizawa, Takashi Hase, Shigeru Hirao, Tadatoshi Danno
  • Publication number: 20150060942
    Abstract: Sometimes to warp a group III nitride semiconductor and a silicon by the stress of the group III nitride semiconductor acting on the silicon. A semiconductor device includes a substrate, a buffer layer, and a semiconductor layer. A trench is formed on a sixth face of the semiconductor layer. The trench passes through the semiconductor layer and the buffer layer. The bottom of the trench reaches at least the inside of the substrate.
    Type: Application
    Filed: August 8, 2014
    Publication date: March 5, 2015
    Inventors: Ippei Kume, Takashi Onizawa, Takashi Hase, Shigeru Hirao, Tadatoshi Danno
  • Publication number: 20020185164
    Abstract: The cleaning treatment apparatus of the present invention is constituted so that a cleaning liquid is continuously supplied by a liquid film forming means in a gap formed between a surface of a processed member held horizontally and rotationally driven by a holding and rotating means and a ultrasonically oscillating lower face of a ultrasonic oscillating means, to thereby form a liquid film in the gap. Hereby, the surface of the processed member is subjected to a cleaning treatment by the liquid film, which is ultrasonically oscillated by the ultrasonic oscillating means. At this stage, as the processed member is rotated by the holding and rotating means, the surface of the processed member is properly cleaned by the ultrasonically oscillating cleaning liquid not only in a region thereof opposed to the ultrasonic oscillating means during the standstill of the member but also in a region thereof opposed to the ultrasonic oscillating means during the rotation of the member.
    Type: Application
    Filed: March 13, 2002
    Publication date: December 12, 2002
    Applicant: NEC CORPORATION
    Inventors: Takashi Tetsuka, Shigeru Hirao, Syoichi Okano, Tomomi Echigo, Hironobu Suzuki, Masaya Takeuchi, Hirotoshi Inada