Patents by Inventor Shigeru Hiura

Shigeru Hiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170269206
    Abstract: A radar apparatus according to an embodiment of the present invention includes an oversampler, a weight vector calculator, a meteorological parameter calculator, an error influence degree calculator, and an error reducer. The oversampler performs oversampling on a received signal to acquire a sampling signal. The weight vector calculator calculates a weight vector based on the sampling signal and a waveform information matrix. The meteorological parameter calculator calculates an estimated value of a meteorological parameter on an observation target based on the vector and the matrix. The error influence degree calculator selects a first observation target considering an estimated error included in the estimated value, or an error influence degree based on the estimated error. The error reducer subtracts an estimated error that the first observation target gives to an estimated value of a meteorological parameter on a second observation target, from the estimated value on the second observation target.
    Type: Application
    Filed: December 29, 2016
    Publication date: September 21, 2017
    Inventors: Tomomi AOKI, Kazuaki KAWABATA, Koichiro GOMI, Shigeru HIURA
  • Publication number: 20170269194
    Abstract: A signal processing device in accordance with one aspect of the present invention includes a first signal processor, a second signal processor, and a signal generator. The first signal processor is configured to generate a first signal by signal processing based on a first window function, a reference signal, and a reception signal. The second signal processor is configured to generate a second signal by signal processing based on a second window function, the reference signal, and the reception signal. The signal generator is configured to generate a third signal based on at least the first signal and the second signal.
    Type: Application
    Filed: December 29, 2016
    Publication date: September 21, 2017
    Inventors: Koichiro GOMI, Shigeru HIURA, Tomomi AOKI, Kazuaki KAWABATA
  • Publication number: 20160064791
    Abstract: According to one embodiment, an impedance converter includes a plurality of disposed characteristic impedance elements and at least one stub. The disposed characteristic impedance elements each has an electric length corresponding to a particular frequency. The at least one stub is formed on a characteristic impedance element formed on a signal input side among the plurality of characteristic impedance elements, and has an impedance value which suppresses passage of a signal having a predetermined multiple of a fundamental frequency.
    Type: Application
    Filed: September 2, 2015
    Publication date: March 3, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi ONO, Takaya KITAHARA, Shigeru HIURA
  • Patent number: 9209760
    Abstract: According to one embodiment, a high-frequency, broadband amplifier circuit includes two drive elements, a matching circuit, a Balun circuit, a power supply, and a power supply circuit. The matching circuit includes two pattern circuits. The pattern circuits convey, in differential mode, the high-frequency signals supplied from the two drive elements. The Balun circuit converts the high-frequency signal to a single-end mode signal. The power supply circuit is connected one of the pattern circuits, and supplies at least the output of the power supply to the other pattern circuit.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Ono, Takaya Kitahara, Shigeru Hiura
  • Publication number: 20140266443
    Abstract: According to one embodiment, a high-frequency, broadband amplifier circuit includes two drive elements, a matching circuit, a Balun circuit, a power supply, and a power supply circuit. The matching circuit includes two pattern circuits. The pattern circuits convey, in differential mode, the high-frequency signals supplied from the two drive elements. The Balun circuit converts the high-frequency signal to a single-end mode signal. The power supply circuit is connected one of the pattern circuits, and supplies at least the output of the power supply to the other pattern circuit.
    Type: Application
    Filed: September 16, 2013
    Publication date: September 18, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Ono, Takaya Kitahara, Shigeru Hiura
  • Publication number: 20090231778
    Abstract: A high frequency MEMS 1 as a high frequency electrical element has a silicon substrate 2 wholly formed with an insulation film, a first signal line 4 provided on the silicon substrate 2, a second signal line 5 provided on the silicon substrate 2, the second signal line 5 crossing the first signal line 4 within a first region above the silicon substrate 2, and a dielectric film 9 interposed between the first signal line 4 and the second signal line 5, and provided on one of the first signal line 4 and the second signal line 5, within the first region, the first signal line 4 and the second signal line 5 being relatively movable in directions for a contacting approach and a mutual spacing in between.
    Type: Application
    Filed: March 11, 2009
    Publication date: September 17, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeru Hiura, Hiroaki Yamazaki, Tamio Ikehashi
  • Patent number: 7473991
    Abstract: A semiconductor device of an embodiment of the invention has a package substrate, and a semiconductor chip mounted on the package substrate. The semiconductor chip has an output section, and a filter section for decreasing the electromagnetic noise generated from the data communication path. The output section outputs a data signal into the data communication path, and has a buffer amplifier section for compensating the data signal.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: January 6, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Hiura, Takaya Kitahara, Masanori Kinugasa, Akira Takiba, Masaru Mizuta, Kiyoyasu Shibata
  • Publication number: 20070164788
    Abstract: A semiconductor device of an embodiment of the invention has a package substrate, and a semiconductor chip mounted on the package substrate. The semiconductor chip has an output section, and a filter section for decreasing the electromagnetic noise generated from the data communication path. The output section outputs a data signal into the data communication path, and has a buffer amplifier section for compensating the data signal.
    Type: Application
    Filed: December 21, 2006
    Publication date: July 19, 2007
    Inventors: Shigeru HIURA, Takaya Kitahara, Masanori Kinugasa, Akira Takiba, Masaru Mizuta, Kiyoyasu Shibata