Abstract: Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

Abstract: Pieces of information on multiple file management systems are managed by one contract in a distributed ledger. An administrator terminal includes: a file management system generation unit that issues a contract generation transaction for generating, in blockchain data, a contract in which a network identifier that identifies a file management system is associated with an identifier of a participant terminal in a blockchain system, and notifying the participant terminal of the network identifier and an identifier of the contract; and a file management control unit that issues a registration transaction for registering, in the contract, connection information of the administrator terminal in the file management system, acquires connection information of the participant terminal in the file management system from the contract, and establishes a P2P connection with the participant terminal based on the acquired connection information.

Abstract: Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

Abstract: A semiconductor device includes a thin film transistor including: a substrate 1; a gate electrode 2 supported on the substrate 1; a semiconductor layer 4 provided on the gate electrode with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region SG that is located between the first region and the second region and overlaps with the gate electrode as seen from a direction normal to the substrate; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s electrically connected to the first region with the first contact layer therebetween; and a drain electrode 8d electrically connected to the second region with the second contact layer therebetween, wherein: the semiconductor layer includes a crystalline silicon region 4c, and at least a portion of the crystalline silicon region is located in the source-drain interval region SG;

Abstract: A semiconductor device includes a thin film transistor 101 including: a semiconductor layer 4 provided on a gate electrode 2 with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region RG that is located between the first region and the second region and overlaps with the gate electrode as seem from a direction normal to a substrate; a protection layer 5 arranged on the semiconductor layer 4; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s; and a drain electrode 8d, wherein: the semiconductor layer 4 includes a crystalline silicon region 4p, and at least a portion of the crystalline silicon region 4p is located in the source-drain interval region RG; and at least one opening 10 is provided that runs through the protection layer 5 and the semiconductor layer 4 and reaches the gate insulating layer 3, wherein the at l

Abstract: A laser annealing method according to an embodiment of the present invention includes: a step of disposing substrate (1S) on a stage (70), the substrate having an amorphous silicon film formed on a surface thereof; a step of supplying a nitrogen gas at ?100° C. or below toward a surface in a selected region of the amorphous silicon film; and a step of emitting a plurality of laser beams (LB) toward the selected region having the nitrogen gas supplied thereto, to form a plurality of crystalline silicon islets in the amorphous silicon film.

Abstract: A semiconductor device includes a thin film transistor including: a substrate 1; a gate electrode 2 supported on the substrate 1; a semiconductor layer 4 provided on the gate electrode with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region SG that is located between the first region and the second region and overlaps with the gate electrode as seen from a direction normal to the substrate; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s electrically connected to the first region with the first contact layer therebetween; and a drain electrode 8d electrically connected to the second region with the second contact layer therebetween, wherein: the semiconductor layer includes a crystalline silicon region 4c, and at least a portion of the crystalline silicon region is located in the source-drain interval region SG;

Abstract: A semiconductor device includes a thin film transistor 101 including: a semiconductor layer 4 provided on a gate electrode 2 with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region RG that is located between the first region and the second region and overlaps with the gate electrode as seem from a direction normal to a substrate; a protection layer 5 arranged on the semiconductor layer 4; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s; and a drain electrode 8d, wherein: the semiconductor layer 4 includes a crystalline silicon region 4p, and at least a portion of the crystalline silicon region 4p is located in the source-drain interval region RG; and at least one opening 10 is provided that runs through the protection layer 5 and the semiconductor layer 4 and reaches the gate insulating layer 3, wherein the at l

Abstract: In the present invention, a gate electrode is formed on a substrate surface, and an insulation film is formed on the substrate surface whereon the gate electrode has been formed. A first amorphous silicon layer is formed on the substrate surface whereon the insulation film has been formed. An energy beam is irradiated onto a plurality of required sites spaced from each other in the first amorphous silicon layer to transform each of the required sites into a polysilicon layer. Each of the required sites is situated on the upper side of the gate electrode and serves as a channel region between a source and a drain. This allows other sites, which are in the first amorphous silicon layer and related to the plurality of required sites, to also be irradiated by the energy beam and ablated so as to form at the other sites a cleared portion having a required shape.

Abstract: There are provided a display apparatus and a method of manufacturing the display apparatus. The display apparatus includes a pixel having a first thin film transistor and a drive circuit having a second thin film transistor and driving the pixel, wherein a first channel region of the first thin film transistor and a second channel region of the second thin film transistor are configured to have different electrical characteristics (for example, electron mobility, thereby enabling the first thin film transistor and the second thin film transistor to function suitably for the each role thereof).

Abstract: Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

Abstract: Provided are a thin film transistor having properties properly adjusted by adjusting crystallinity of a polycrystalline silicon, and a method of manufacturing the same. The silicon layer functioning as a channel layer of a TFT comprises an amorphous part, a first polycrystalline part and a second polycrystalline part. The first and second polycrystalline parts are formed by irradiating the silicon layer with laser beams (energy beams) through the mask comprising the shielding part for shielding the energy beams, the first transmission part for transmitting the energy beams and the second transmission part for transmitting the energy beams at a transmittance lower than that of the first transmission part. By the presence of the second polycrystalline part, properties of the TFT such as an electron mobility are properly adjusted. Further, properties of the TFT can be adjusted easily by adjusting the configuration of the mask.

Abstract: A method of manufacturing a thin film transistor including: forming a gate electrode on a substrate, forming an insulating film, forming a first silicon layer including an amorphous silicon, irradiating a region of the first silicon layer from a part or the whole of a predetermined region of the first silicon layer to an outside of the predetermined region with an energy beam so as to convert a portion of the first silicon layer into a polycrystalline silicon, a first etching step for etching the first silicon layer while leaving the predetermined region, forming a second silicon layer including an amorphous silicon so as to cover the predetermined region, a second etching step for etching the second silicon layer covering the predetermined region while leaving a part of the second silicon layer, the part larger than the predetermined region, and forming a source electrode and a drain electrode.

Abstract: The thin film transistor includes: a gate electrode formed on a surface of a substrate; a polysilicon layer formed on an upper side of the gate electrode; an amorphous silicon layer formed on the polysilicon layer so as to cover the same; an n+ silicon layer formed on an upper side of the amorphous silicon layer; and a source electrode and a drain electrode which are formed on the n+ silicon layer, wherein, in a projected state in which the polysilicon layer, the source electrode and the drain electrode are projected onto the surface of the substrate, a part of the polysilicon layer and a part of each of the source electrode and the drain electrode are adapted so as to be overlapped with each other, and in the projected state, a minimum dimension, in a width direction orthogonal to a length direction between the source electrode and the drain electrode, of the polysilicon layer located between the source electrode and the drain electrode is smaller than dimensions in the width direction of the source electrod

Abstract: The method for manufacturing a thin film transistor includes the processes of forming a gate electrode on a surface of a substrate, forming an insulation film on the surface of the substrate on which the gate electrode is formed, forming a first amorphous silicon layer on the surface of the substrate on which the insulation film is formed, annealing a plurality of required places separated from each other on the first amorphous silicon layer by irradiating the same with an energy beam to change the required places to a polysilicon layer, forming a second amorphous silicon layer by covering the polysilicon layer, forming an n+ silicon layer on a surface of the second amorphous silicon layer, etching the first amorphous silicon layer, the second amorphous silicon layer and the n+ silicon layer.

Abstract: Provided are a thin film transistor having properties properly adjusted by adjusting crystallinity of a polycrystalline silicon, and a method of manufacturing the same. The silicon layer functioning as a channel layer of a TFT comprises an amorphous part, a first polycrystalline part and a second polycrystalline part. The first and second polycrystalline parts are formed by irradiating the silicon layer with laser beams (energy beams) through the mask comprising the shielding part for shielding the energy beams, the first transmission part for transmitting the energy beams and the second transmission part for transmitting the energy beams at a transmittance lower than that of the first transmission part. By the presence of the second polycrystalline part, properties of the TFT such as an electron mobility are properly adjusted. Further, properties of the TFT can be adjusted easily by adjusting the configuration of the mask.

Abstract: A method of manufacturing a thin film transistor including: forming a gate electrode on a substrate, forming an insulating film, forming a first silicon layer including an amorphous silicon, irradiating a region of the first silicon layer from a part or the whole of a predetermined region of the first silicon layer to an outside of the predetermined region with an energy beam so as to convert a portion of the first silicon layer into a polycrystalline silicon, a first etching step for etching the first silicon layer while leaving the predetermined region, forming a second silicon layer including an amorphous silicon so as to cover the predetermined region, a second etching step for etching the second silicon layer covering the predetermined region while leaving a part of the second silicon layer, the part larger than the predetermined region, and forming a source electrode and a drain electrode.

Abstract: There are provided a display apparatus and a method of manufacturing the display apparatus. The display apparatus includes a pixel having a first thin film transistor and a drive circuit having a second thin film transistor and driving the pixel, wherein a first channel region of the first thin film transistor and a second channel region of the second thin film transistor are configured to have different electrical characteristics (for example, electron mobility, thereby enabling the first thin film transistor and the second thin film transistor to function suitably for the each role thereof).

Abstract: The thin film transistor includes a gate electrode formed on a surface of a substrate; a first amorphous silicon layer formed on an upper side of the gate electrode; a plurality of polysilicon layers separated by the first amorphous silicon layer and formed on the upper side of the gate electrode with a required spaced dimension; a second amorphous silicon layer and an n+ silicon layer which are formed on the upper side of the plurality of polysilicon layers and the first amorphous silicon layer; and a source electrode and a drain electrode formed on the n+ silicon layer.

Abstract: In the present invention, a gate electrode is formed on a substrate surface, and an insulation film is formed on the substrate surface whereon the gate electrode has been formed. A first amorphous silicon layer is formed on the substrate surface whereon the insulation film has been formed. An energy beam is irradiated onto a plurality of required sites spaced from each other in the first amorphous silicon layer to transform each of the required sites into a polysilicon layer. Each of the required sites is situated on the upper side of the gate electrode and serves as a channel region between a source and a drain. This allows other sites, which are in the first amorphous silicon layer and related to the plurality of required sites, to also be irradiated by the energy beam and ablated so as to form at the other sites a cleared portion having a required shape.