Patents by Inventor Shigeru Kambara
Shigeru Kambara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7369034Abstract: A chip variable resistor which is capable of keeping the resistance at an adjusted value and can be manufactured easily is provided. An insulating substrate is formed with a through-hole capable of receiving a driver, and the upper surface of the insulating substrate is formed with a resistor film surrounding the through-hole. A rotor in the form of a circular plate overlaps the resistor film via a spacer made of an insulating material. The rotor is pressed and held from the outside by a holder made of a metal plate. The spacer is partially cut away so that a contact portion of the rotor is exposed downward for coming into contact with the resistor film. Since the holder surrounds the rotor from the outside, the resilient force of the holder can strongly act on the rotor. Therefore, the resistance can be reliably kept at the adjusted value.Type: GrantFiled: May 7, 2004Date of Patent: May 6, 2008Assignee: Rohm Co., Ltd.Inventor: Shigeru Kambara
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Publication number: 20070001800Abstract: A chip variable resistor which is capable of keeping the resistance at an adjusted value and can be manufactured easily is provided. An insulating substrate is formed with a through-hole capable of receiving a driver, and the upper surface of the insulating substrate is formed with a resistor film surrounding the through-hole. A rotor in the form of a circular plate overlaps the resistor film via a spacer made of an insulating material. The rotor is pressed and held from the outside by a holder made of a metal plate. The spacer is partially cut away so that a contact portion of the rotor is exposed downward for coming into contact with the resistor film. Since the holder surrounds the rotor from the outside, the resilient force of the holder can strongly act on the rotor. Therefore, the resistance can be reliably kept at the adjusted value.Type: ApplicationFiled: May 7, 2004Publication date: January 4, 2007Applicant: ROHM CO., LTD.Inventor: Shigeru Kambara
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Patent number: 6902782Abstract: A packaging tape includes a carrier tape and a top tape. The carrier tape is provided with device-accommodating recesses. The top tape is attached to the carrier tape by heat-sealing to close the device-accommodating recesses. The carrier tape includes a resin layer made by impregnation and drying of a water-dispersible resin or a water-soluble resin or both. The top tape is attached to the resin layer of the carrier tape. This prevents the generation of static electricity on the top tape as the top tape is peeled off the carrier tape. Accordingly, the unscheduled removal of electronic devices from the device-accommodating recesses by the static electricity is avoided.Type: GrantFiled: May 14, 2003Date of Patent: June 7, 2005Assignee: Rohm Co., Ltd.Inventor: Shigeru Kambara
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Patent number: 6801439Abstract: A multiple network electronic component includes an insulator having a first element-forming surface and a second element-forming surface spaced thicknesswise from the first element-forming surface, a plurality of first intermediate film conductors 20A formed on the first element-forming surface and spaced from each other, a plurality of second intermediate film conductors 20B formed on the second element-forming surface and spaced from each other in corresponding relation to the first intermediate film conductors, and a plurality of through-conductive paths penetrating the insulator for electrically connecting each of the first intermediate film conductors to a corresponding one of the second film conductors. The first element-forming surface is formed with a plurality of first elements and a plurality of second elements, and each of the first and second elements has one end connected to a respective one of the first intermediate film conductors.Type: GrantFiled: February 13, 2003Date of Patent: October 5, 2004Assignee: Rohm Co., Ltd.Inventor: Shigeru Kambara
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Publication number: 20040083074Abstract: A multiple network electronic component includes an insulator having a first element-forming surface and a second element-forming surface spaced thicknesswise from the first element-forming surface, a plurality of first intermediate film conductors 20A formed on the first element-forming surface and spaced from each other, a plurality of second intermediate film conductors 20B formed on the second element-forming surface and spaced from each other in corresponding relation to the first intermediate film conductors, and a plurality of through-conductive paths penetrating the insulator for electrically connecting each of the first intermediate film conductors to a corresponding one of the second film conductors. The first element-forming surface is formed with a plurality of first elements and a plurality of second elements, and each of the first and second elements has one end connected to a respective one of the first intermediate film conductors.Type: ApplicationFiled: February 13, 2003Publication date: April 29, 2004Applicant: ROHM CO., LTD.Inventor: Shigeru Kambara
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Publication number: 20030215590Abstract: A packaging tape includes a carrier tape and a top tape. The carrier tape is provided with device-accommodating recesses. The top tape is attached to the carrier tape by heat-sealing to close the device-accommodating recesses. The carrier tape includes a resin layer made by impregnation and drying of a water-dispersible resin or a water-soluble resin or both. The top tape is attached to the resin layer of the carrier tape. This prevents the generation of static electricity on the top tape as the top tape is peeled off the carrier tape. Accordingly, the unscheduled removal of electronic devices from the device-accommodating recesses by the static electricity is avoided.Type: ApplicationFiled: May 14, 2003Publication date: November 20, 2003Applicant: ROHM CO., LTDInventor: Shigeru Kambara
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Patent number: 6462304Abstract: A chip resistor is formed with an elongated resistor connecting a pair of electrodes on a substrate and grooves are formed on the surface of the resistor in a characteristic pattern having a longer branch and a shorter branch. The longer branch may be L-shaped, extending between a selected point on a side edge of the resistor and an end point which is nearer towards one of the electrodes. The shorter branch extends between another point on the side edge of the resistor and an intermediate point on the longer branch other than the end point. To form the grooves in such a pattern, the longer branch is formed first by laser-trimming from the side edge of the resistor to the end point. The laser is then switched off and is moved to the intermediate branching point along the branch of the groove just formed. The shorter branch is then formed by switching on the laser and moving it from the branching point to the other end.Type: GrantFiled: March 2, 2001Date of Patent: October 8, 2002Assignee: Rohm Co., Ltd.Inventors: Hiroshi Kaida, Shigeru Kambara, Masato Doi
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Publication number: 20020118094Abstract: A resistor includes an insulating substrate, a resistive layer formed on the substrate, electrodes connected to the resistive layer, and a protection cover overlapping with the resistive layer. The resistive layer is made of tantalum. The resistive layer is processed into a predetermined pattern by photolithography in which a photo resist layer is formed by the spin coating method applied to a circular mother substrate.Type: ApplicationFiled: April 8, 2002Publication date: August 29, 2002Inventors: Shigeru Kambara, Toshihiro Teramae
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Publication number: 20010030178Abstract: A chip resistor is formed with an elongated resistor connecting a pair of electrodes on a substrate and grooves are formed on the surface of the resistor in a characteristic pattern having a longer branch and a shorter branch. The longer branch may be L-shaped, extending between a selected point on a side edge of the resistor and an end point which is nearer towards one of the electrodes. The shorter branch extends between another point on the side edge of the resistor and an intermediate point on the longer branch other than the end point. To form the grooves in such a pattern, the longer branch is formed first by laser-trimming from the side edge of the resistor to the end point. The laser is then switched off and is moved to the intermediate branching point along the branch of the groove just formed. The shorter branch is then formed by switching on the laser and moving it from the branching point to the other end.Type: ApplicationFiled: March 2, 2001Publication date: October 18, 2001Inventors: Hiroshi Kaida, Shigeru Kambara, Masato Doi
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Patent number: 6292091Abstract: A resistor includes an insulating substrate, a resistive layer formed on the substrate, and first and second terminal electrodes connected to the resistive layer. The resistive layer is divided into at least a first portion of greater resistance and a second portion of smaller resistance. The first portion is closer to the first terminal electrode than the second portion is. A trimming groove is formed in the second portion for adjustment of the resistance of the resistor.Type: GrantFiled: July 21, 2000Date of Patent: September 18, 2001Assignee: Rohm Co., Ltd.Inventors: Shigeru Kambara, Toshihiro Teramae
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Patent number: 6153256Abstract: A chip resistor includes a spaced pair of main top electrodes on an insulating substrate, a resistor layer formed on the insulating substrate to bridge between the main top electrodes, an overcoat layer formed over the resistor layer, and a pair of auxiliary top electrodes formed on the main top electrodes in contact with the overcoat layer. Each of the auxiliary top electrodes contains a glass material in addition to a metal material for integration with the overcoat layer.Type: GrantFiled: August 13, 1999Date of Patent: November 28, 2000Assignee: Rohm Co., Ltd.Inventors: Shigeru Kambara, Kaoru Sakai
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Patent number: 6127722Abstract: In a chip type resistor, a middle coat which is a component of a cover coat has extensions or enclaves formed at portions on a surface of main upper electrodes of terminal electrodes. Auxiliary upper electrodes of terminal electrodes are formed extending over both the surface of extensions or enclaves of middle coat and the surface of main upper electrodes. Therefore, the step between the surface of terminal electrodes at opposing ends of resistive film and the surface of cover coat for the resistive film can be reduced or eliminated with low cost.Type: GrantFiled: December 19, 1997Date of Patent: October 3, 2000Assignee: Rohm Co., Ltd.Inventors: Masato Doi, Shigeru Kambara
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Patent number: 6128199Abstract: A resistance element, a capacitor and an intermediate electrode are formed on a substrate. The capacitor and the resistance element are connected with the intermediate electrode interposed. Two terminal electrode portions are connected to each other through the intermediate electrode.Type: GrantFiled: March 16, 1998Date of Patent: October 3, 2000Assignee: Rohm Co., Ltd.Inventor: Shigeru Kambara
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Patent number: 5990781Abstract: A chip type resistor includes terminal electrodes having main upper electrodes, extensions or enclaves of a resistive film formed on left and right sides of the upper surface of main upper electrodes, and auxiliary upper electrodes formed on upper surfaces of extensions or enclaves. Therefore, step between the upper surface of terminal electrodes at opposing ends of resistive film and an upper surface of cover coat covering the resistive film can be reduced or eliminated at a low cost.Type: GrantFiled: March 13, 1998Date of Patent: November 23, 1999Assignee: Rohm Co., Ltd.Inventor: Shigeru Kambara
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Patent number: 5757076Abstract: A chip type electronic component is provided which includes a chip substrate having an opposite pair of end edges and an opposite pair of side edges between the pair of end edges. An opposite pair of first electrodes is formed in a layer on the chip substrate to extend from the end edges toward each other. Each first electrode has a narrower root portion closer to a corresponding end edge of the chip substrate and a wider head portion spaced from the corresponding end edge. An electronic element is formed in another layer on the chip substrate in electrical conduction with both of the first electrodes, and an insulating protective coating is formed on the chip substrate to entirely cover the electronic element together with the entire wider head portion of each electrode.Type: GrantFiled: October 14, 1997Date of Patent: May 26, 1998Assignee: Rohm Co., Ltd.Inventor: Shigeru Kambara
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Patent number: 5691877Abstract: A chip type thick film capacitor is provided which comprises an insulating chip (11) serving as a substrate and having a head surface (11a). The chip head surface (11a) is formed with a first lead electrode (12) and a second lead electrode (13) spaced from the first lead electrode (12). The chip head surface (11a) is also formed with a first capacitor electrode (14) in electrical conduction with the first lead electrode (12). The chip head surface (11a) is further formed with an auxiliary electrode (20) which is held in electrical conduction with the second lead electrode (13) but spaced from the first capacitor electrode (14) by a predetermined distance (D1). A dielectric layer (15) is formed on the first capacitor electrode (14), and a second capacitor electrode (16) is formed on the dielectric layer (15) in electrical conduction with the auxiliary electrode (20).Type: GrantFiled: February 16, 1996Date of Patent: November 25, 1997Inventors: Toshihiro Hanamura, Shigeru Kambara
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Patent number: 5611129Abstract: A packaged piezoelectric oscillator is provided which comprises an insulating package body, a piezoelectric element, and a lid member. The package body has an upwardly open housing groove which has a bottom surface formed with oscillator electrodes at both ends of the housing groove. The piezoelectric element is fixedly received in the housing groove of the insulating package body and held in electrical conduction with the respective oscillator electrodes. The lid member is attached to the package body to close the housing groove. The housing groove has an intermediate wider width portion, and each end of the housing groove is provided with a pair of end positioning walls projecting toward each other for providing a narrower width portion between the pair of end positioning walls.Type: GrantFiled: June 6, 1995Date of Patent: March 18, 1997Assignee: Rohm Co., Ltd.Inventors: Hisaya Yoshimoto, Shigeru Kambara, Ikuo Matsumoto
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Patent number: 5548269Abstract: A chip resistor is provided which comprises an insulating chip substrate, a resistor element formed on the chip substrate, a first pair of electrode terminals branching out from one end of the resistor element, and a second pair of electrode terminals branching out from the other end of the resistor element. One of the first pair electrode terminals is a current terminal while the other of the first pair electrode terminals is a voltage terminal. Similarly, one of the second pair electrode terminals is a current terminal, and the other of the second pair electrode terminals is a voltage terminal.Type: GrantFiled: September 26, 1994Date of Patent: August 20, 1996Assignee: Rohm Co. Ltd.Inventors: Takafumi Katsuno, Shigeru Kambara
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Patent number: 5506463Abstract: A packaged piezoelectric oscillator is provided which comprises an insulating package body, a piezoelectric element, and a lid member. The package body has an upwardly open housing groove which has a bottom surface formed with oscillator electrodes at both ends of the housing groove. The piezoelectric element is fixedly received in the housing groove of the insulating package body and held in electrical conduction with the respective oscillator electrodes. The lid member is attached to the package body to close the housing groove. The housing groove has an intermediate wider width portion, and each end of the housing groove is provided with a pair of end positioning walls projecting toward each other for providing a narrower width portion between the pair of end positioning walls.Type: GrantFiled: August 22, 1994Date of Patent: April 9, 1996Assignee: Rohm Co., Ltd.Inventors: Hisaya Yoshimoto, Shigeru Kambara, Ikuo Matsumoto
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Patent number: 5502344Abstract: A packaged piezoelectric oscillator is provided which comprises an insulating package body, a piezoelectric element, and a lid member. The package body has an upwardly open housing groove which has a bottom surface formed with oscillator electrodes at both ends of the housing groove. The package body is externally formed with first to third electrodes spaced from each other. The first and second electrodes extend into the housing groove for electrical connection to the respective oscillator electrodes, whereas the third electrode is located between the first and second electrodes. The piezoelectric element is fixedly received in the housing groove of the insulating package body and held in electrical conduction with the respective oscillator electrodes. The lid member is attached to the package body to close the housing groove. The lid member has a lower surface formed with first to third capacitor electrodes in electrical conduction with the first to third lead electrodes, respectively.Type: GrantFiled: August 22, 1994Date of Patent: March 26, 1996Assignee: Rohm Co., Ltd.Inventors: Hisaya Yoshimoto, Shigeru Kambara, Ikuo Matsumoto