Patents by Inventor Shigeru Kataoka

Shigeru Kataoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7282979
    Abstract: A phase shifting device includes a signal source; a variable phase shifter; first and second doubling circuits; and a 90-degree phase comparator. An output from the signal source is connected to an input of the variable phase shifter and to an input of the second doubling circuit, an output from the variable phase shifter is connected to an input of the first doubling circuit, an output from the first doubling circuit serves as a first output signal, and an output from the second doubling circuit serves as a second output signal. The first output signal and the second output signal are inputted to the 90-degree phase comparator. The amount of phase shift rotation of the variable phase shifter is changed by a phase shift control signal outputted from the 90-degree phase comparator. By this, an exact 90-degree phase shift is obtained.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: October 16, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takatoshi Tanaka, Mitsuru Tanabe, Shigeru Kataoka
  • Publication number: 20070103247
    Abstract: The present invention includes two lines of PLL circuits. The first PLL circuit 31 includes a first voltage-controlled oscillator 34 that increases in oscillation frequency as a control voltage increases. The second PLL circuit 41 includes a second voltage-controlled oscillator 44 that decreases in oscillation frequency as a control voltage increases. A feedback voltage applied to the first voltage-controlled oscillator 34 is added to a feedback voltage applied to the second voltage controlled oscillator 44. The output signals of the two voltage-controlled oscillators 34, 44 are synthesized by a mixer 13, so that the transient responses of the first PLL circuit 31 and the second PLL circuit 41 cancel each other out. Thus, the transient response of the output signal of the mixer 13 becomes shorter.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 10, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tetsuro YOKOTA, Satoshi YAMAGUCHI, Shigeru KATAOKA
  • Patent number: 7190934
    Abstract: An amplifier 3 amplifies a transmission signal, and outputs the amplified signal to an antenna. A directional coupler 6 causes a portion of power passing through a first path connecting the amplifier 3 and the antenna to branch to a second path. A detection section 7 detects an electrical parameter changing with a change in the intensity of power reflected from the antenna to the amplifier 3, thereby detecting the intensity of the reflected power. A control circuit 8 changes a proportion of power caused to branch to the second path by the directional coupler 6, based on the electrical parameter detected by the detection circuit 7. Thus, it is possible to provide a reflected power suppression circuit capable of facilitating size reduction and preventing a power amplifier from being damaged due to breakage of an antenna, while minimizing a power loss at the time of signal transmission.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: March 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeru Kataoka, Shingo Matsuda, Ichiro Kato
  • Patent number: 7102445
    Abstract: An amplifier 2c amplifies a transmit signal and outputs the amplified transmit signal to an antenna 10. A drive current for driving the amplifier 2c is inputted to a drive current input terminal 7. A current divider circuit 41 is provided between the drive current input terminal 7 and the amplifier 2c, and divides the drive current among a plurality of paths. The current divider circuit 41 includes a plurality of switching elements provided in the paths, respectively, and switched between a conduction state and a blocking state; and a resistance element 13 provided in at least one of the plurality of paths. A detection section 5 detects an electrical parameter in the resistance element. A control section 6 switches the plurality of switching elements between a conduction state and a blocking state, based on the electrical parameter detected by the detection section 5.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: September 5, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazutaka Yamazaki, Ichiro Kato, Shigeru Kataoka
  • Publication number: 20060055442
    Abstract: A phase shifting device includes a signal source; a variable phase shifter; first and second doubling circuits; and a 90-degree phase comparator. An output from the signal source is connected to an input of the variable phase shifter and to an input of the second doubling circuit, an output from the variable phase shifter is connected to an input of the first doubling circuit, an output from the first doubling circuit serves as a first output signal, and an output from the second doubling circuit serves as a second output signal. The first output signal and the second output signal are inputted to the 90-degree phase comparator. The amount of phase shift rotation of the variable phase shifter is changed by a phase shift control signal outputted from the 90-degree phase comparator. By this, an exact 90-degree phase shift is obtained.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 16, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takatoshi Tanaka, Mitsuru Tanabe, Shigeru Kataoka
  • Publication number: 20060009164
    Abstract: By using the leakage of an RF signal, transmitted power is controlled without using a signal distributor such as a directional coupler. The RF signal is leaked due to a parasitic capacitance between the source (or drain) terminal and the gate terminal of an FET constituting a transmission-side FET switching circuit of an RF switching circuit.
    Type: Application
    Filed: June 15, 2005
    Publication date: January 12, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Shigeru Kataoka
  • Publication number: 20050270083
    Abstract: A radio frequency switching circuit includes a plurality of input/output terminals for inputting/outputting a radio frequency signal and a plurality of basic switching sections each being provided between adjacent two of the plurality of the input/output terminals. Each of the basic switching sections includes three or more field effect transistors connected in series. Each of two of the field effect transistors connected in series which are located in both ends of the basic switching section, respectively, has a higher threshold voltage than respective threshold voltages of other ones of the field effect transistors.
    Type: Application
    Filed: May 23, 2005
    Publication date: December 8, 2005
    Inventors: Tadayoshi Nakatsuka, Shigeru Kataoka
  • Publication number: 20050259375
    Abstract: An overcurrent protection circuit according to the present invention includes: overcurrent detecting means for detecting a flow of an overcurrent in a load circuit; and voltage controlling means for changing a power supply voltage and supplying the resultant power supply voltage to the load circuit. The overcurrent detecting means detects a voltage decrease occurring when an overcurrent is generated, with respect to a voltage supplied to the load circuit during normal operation. The voltage controlling means suppresses an overcurrent flowing in the load circuit based on the voltage decrease.
    Type: Application
    Filed: May 4, 2005
    Publication date: November 24, 2005
    Inventors: Hideharu Akimura, Shigeru Kataoka, Tougo Nakatani
  • Publication number: 20050174178
    Abstract: An amplifier 2c amplifies a transmit signal and outputs the amplified transmit signal to an antenna 10. A drive current for driving the amplifier 2c is inputted to a drive current input terminal 7. A current divider circuit 41 is provided between the drive current input terminal 7 and the amplifier 2c, and divides the drive current among a plurality of paths. The current divider circuit 41 includes a plurality of switching elements provided in the paths, respectively, and switched between a conduction state and a blocking state; and a resistance element 13 provided in at least one of the plurality of paths. A detection section 5 detects an electrical parameter in the resistance element. A control section 6 switches the plurality of switching elements between a conduction state and a blocking state, based on the electrical parameter detected by the detection section 5.
    Type: Application
    Filed: January 10, 2005
    Publication date: August 11, 2005
    Inventors: Kazutaka Yamazaki, Ichiro Kato, Shigeru Kataoka
  • Publication number: 20050159119
    Abstract: An amplifier 3 amplifies a transmission signal, and outputs the amplified signal to anantenna. A directional coupler 6 causes a portion of power passing through a first path connecting the amplifier 3 and the antenna to branch to a second path. A detection section 7 detects an electrical parameter changing with a change in the intensity of power reflected from the antenna to the amplifier 3, thereby detecting the intensity of the reflected power. A control circuit 8 changes a proportion of power caused to branch to the second path by the directional coupler 6, based on the electrical parameter detected by the detection circuit 7. Thus, it is possible to provide a reflected power suppression circuit capable of facilitating size reduction and preventing a power amplifier from being damaged due to breakage of an antenna, while minimizing a power loss at the time of signal transmission.
    Type: Application
    Filed: November 9, 2004
    Publication date: July 21, 2005
    Inventors: Shigeru Kataoka, Shingo Matsuda, Ichiro Kato
  • Patent number: 5204553
    Abstract: An output signal from an inverter is supplied to a push-pull buffer circuit which includes a first GaAs FET for charging an output terminal to a high potential, a second GaAs FET for discharging the output terminal to a low potential, and a current limiting element connected in series to the first GaAs FET, for charging the output terminal to a high potential.
    Type: Grant
    Filed: July 11, 1991
    Date of Patent: April 20, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Kataoka, Shoichi Shimizu
  • Patent number: 5160858
    Abstract: Use of independent current-regulating MES FETs prevents the output terminal potential of a current-regulating MES FET from being fluctuated. This results in no change in the output potential of a DCFL circuit that uses the output terminal potential as its intermediate ground potential, thereby eliminating the malfunction of a subsequent circuit connected to the DCFL circuit, even when another DCFL circuit has carried a large amount of current momentarily, for example, and the output terminal potential of a related current-regulating MES FET becomes unstable to supply as much current as needed to compensate for the drawn current.
    Type: Grant
    Filed: October 10, 1991
    Date of Patent: November 3, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Kataoka, Shoichi Shimizu