Patents by Inventor Shigeru Kondou
Shigeru Kondou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230095398Abstract: A method for producing a battery, includes: stacking a separator having an adhesive layer and an electrode plate in such a manner that the electrode plate is in contact with the adhesive layer; forming a multilayer electrode body by bonding a part of the electrode plate to the adhesive layer such that the electrode plate has a bonded region bonded with the adhesive layer and a non-bonded region not bonded with the adhesive layer; putting the multilayer electrode body in a case; and injecting an electrolytic solution into the case.Type: ApplicationFiled: March 10, 2021Publication date: March 30, 2023Inventors: Hiroshi YAMASHITA, Kazutaka NISHIKAWA, Shigeru KONDOU, Noriaki YAMAMOTO
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Publication number: 20230095738Abstract: A method for manufacturing a battery includes: accommodating a stacked electrode body, in which a separator that has an adhesive layer and an electrode plate are stacked and the electrode plate is bonded to the separator via the adhesive layer, in a case; injecting an electrolytic solution into the case; and reducing the adhesive strength between the electrode plate and the separator at the same time, or around the same time, as the injection of the electrolytic solution.Type: ApplicationFiled: March 10, 2021Publication date: March 30, 2023Inventors: Shigeru KONDOU, Kazutaka NISHIKAWA, Hiroshi YAMASHITA, Noriaki YAMAMOTO
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Patent number: 11095824Abstract: A finder display unit displays a live view image based on a captured image generated by an imaging unit. A digital signal processing unit detects a movement vector between frames in the live view image for a predetermined portion in the captured image. A digital signal processing unit changes a display range of the live view image on the finder display unit based on the detected movement vector of a peripheral portion in the captured image.Type: GrantFiled: March 27, 2020Date of Patent: August 17, 2021Assignee: FUJIFILM CorporationInventors: Takeshi Misawa, Michio Cho, Shigeru Kondou, Atsushi Misawa, Shunsuke Miyagishima, Nanae Sakuma
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Publication number: 20200228726Abstract: A finder display unit displays a live view image based on a captured image generated by an imaging unit. A digital signal processing unit detects a movement vector between frames in the live view image for a predetermined portion in the captured image. A digital signal processing unit changes a display range of the live view image on the finder display unit based on the detected movement vector of a peripheral portion in the captured image.Type: ApplicationFiled: March 27, 2020Publication date: July 16, 2020Applicant: FUJIFILM CorporationInventors: Takeshi MISAWA, Michio CHO, Shigeru KONDOU, Atsushi MISAWA, Shunsuke MIYAGISHIMA, Nanae SAKUMA
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Patent number: 9332208Abstract: An imaging apparatus having a projector, includes: an imaging unit that photographs a subject; a mirror image converting unit that converts a live view image photographed by the imaging unit into a mirror image; a projector that projects the mirror image of the live view image in a direction opposite to a photographing direction of the imaging unit; a control unit that initiates actual photography for recording the subject by the imaging unit when a posture of a main subject satisfies a predetermined condition; and a pose image superimposing unit that superimpose a pose image on a projected image, in which the control unit determines that the predetermined condition is satisfied and performs the actual photography when a superimposition degree of the main subject in the projected image and the pose image is a threshold value or more.Type: GrantFiled: September 12, 2014Date of Patent: May 3, 2016Assignee: FUJIFILM CorporationInventors: Daisuke Hayashi, Shigeru Kondou, Takashi Aoki, Kazuki Inoue, Hiroyuki Oshima, Takeshi Misawa, Atsushi Misawa
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Patent number: 9264612Abstract: A digital camera 10 includes an imaging device 21a, a finder device 15, a phase difference information analyzing portion 71 and a control portion 32. In the finder device 15, an image in which an OVF optical image formed by an objective optical system 65 and an image displayed on a display portion 61 are superimposed on each other can be observed through an eyepiece window 17. The phase difference information analyzing portion 71 determines a focus region and a non-focus region in a photographic subject imaged by the imaging device 21a. The control portion 32 makes control to display an image Eg for highlighting the focus region E in the OVF optical image on the display portion 61 in the state in which the OVF optical image can be observed through the eyepiece window 17.Type: GrantFiled: September 26, 2014Date of Patent: February 16, 2016Assignee: FUJIFILM CorporationInventors: Kazuki Inoue, Shigeru Kondou, Takashi Aoki, Hiroyuki Oshima, Daisuke Hayashi
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Patent number: 9167166Abstract: An image display device includes a beam splitter that splits an incident light entering from a subject side, an imaging device that converts a first optical image generated by an one-side incident light split by the beam splitter into an electrical signal and outputs the converted electrical signal as a capture image, a synthesis image generating unit that generates an electronic information image, a display panel that displays the electronic information image, and an optical prism that emits an optical image of the electronic information image projected from the display panel to be superimposed on a second optical image generated by the other-side split incident light.Type: GrantFiled: September 15, 2014Date of Patent: October 20, 2015Assignee: FUJIFILM CorporationInventors: Hiroyuki Oshima, Shigeru Kondou, Takashi Aoki, Kazuki Inoue, Daisuke Hayashi, Takeshi Misawa, Atsushi Misawa
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Publication number: 20150036025Abstract: An image display device includes a beam splitter that splits an incident light entering from a subject side, an imaging device that converts a first optical image generated by an one-side incident light split by the beam splitter into an electrical signal and outputs the converted electrical signal as a capture image, a synthesis image generating unit that generates an electronic information image, a display panel that displays the electronic information image, and an optical prism that emits an optical image of the electronic information image projected from the display panel to be superimposed on a second optical image generated by the other-side split incident light.Type: ApplicationFiled: September 15, 2014Publication date: February 5, 2015Applicant: FUJIFILM CORPORATIONInventors: Hiroyuki OSHIMA, Shigeru KONDOU, Takashi AOKI, Kazuki INOUE, Daisuke HAYASHI, Takeshi MISAWA, Atsushi MISAWA
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Publication number: 20150009393Abstract: A digital camera 10 includes an imaging device 21a, a finder device 15, a phase difference information analyzing portion 71 and a control portion 32. In the finder device 15, an image in which an OVF optical image formed by an objective optical system 65 and an image displayed on a display portion 61 are superimposed on each other can be observed through an eyepiece window 17. The phase difference information analyzing portion 71 determines a focus region and a non-focus region in a photographic subject imaged by the imaging device 21a. The control portion 32 makes control to display an image Eg for highlighting the focus region E in the OVF optical image on the display portion 61 in the state in which the OVF optical image can be observed through the eyepiece window 17.Type: ApplicationFiled: September 26, 2014Publication date: January 8, 2015Applicant: FUJIFILM CORPORATIONInventors: Kazuki INOUE, Shigeru KONDOU, Takashi AOKI, Hiroyuki OSHIMA, Daisuke HAYASHI
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Publication number: 20150002633Abstract: An imaging apparatus having a projector, includes: an imaging unit that photographs a subject; a mirror image converting unit that converts a live view image photographed by the imaging unit into a mirror image; a projector that projects the mirror image of the live view image in a direction opposite to a photographing direction of the imaging unit; a control unit that initiates actual photography for recording the subject by the imaging unit when a posture of a main subject satisfies a predetermined condition; and a pose image superimposing unit that superimpose a pose image on a projected image, in which the control unit determines that the predetermined condition is satisfied and performs the actual photography when a superimposition degree of the main subject in the projected image and the pose image is a threshold value or more.Type: ApplicationFiled: September 12, 2014Publication date: January 1, 2015Applicant: FUJIFILM CorporationInventors: Daisuke HAYASHI, Shigeru KONDOU, Takashi AOKI, Kazuki INOUE, Hiroyuki OSHIMA, Takeshi MISAWA, Atsushi MISAWA
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Patent number: 8599571Abstract: Memory card (1) includes at least semiconductor chip (3), circuit board (2) with semiconductor chip (3) mounted on main surface (21), having at least rigidity reducing portion (23) formed in main surface (21) or in a linear region of surface (22) opposite to the main surface, and cover portion (71) for covering semiconductor chip (3) on main surface (21) of circuit board (2), wherein circuit board (2) has a plurality of convex regions (201) which flex in a convex shape toward main surface (21) due to rigidity reducing portion (23).Type: GrantFiled: April 18, 2007Date of Patent: December 3, 2013Assignee: Panasonic CorporationInventors: Hidenobu Nishikawa, Daido Komyoji, Atsunobu Iwamoto, Hiroyuki Yamada, Shuichi Takeda, Shigeru Kondou
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Patent number: 8283570Abstract: A semiconductor assembly includes a multilayer wiring board including at least three insulating layers, first, second and third insulating layers and a semiconductor device attached to one principal surface of the first insulating layer. The first, second and third insulating layers are stacked in this order. The multilayer wiring board further includes a heat-insulating member made of a material having a lower thermal conductivity than the insulating layers. The heat-insulating member is disposed between the first and second insulating layers or next to the first insulating layer at a side opposite to the one principal surface.Type: GrantFiled: November 11, 2008Date of Patent: October 9, 2012Assignee: Panasonic CorporationInventors: Yoshihiro Tomura, Shigeru Kondou, Teppei Iwase
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Patent number: 8154123Abstract: A solder bump and a conductive connection structure are provided which can conductively connect a semiconductor chip and a substrate with high connection reliability. Filler 5 is contained in a solder bump 6 and a solder joint 17 which connect a connection electrode 3 of a semiconductor chip 2 and a substrate 11, and the filler has a larger density on the side of the connection electrode 3 than on the side of the substrate 11 in the solder joint 17. Therefore, in the cooling solidification of solder, the shrinkage of the solder joint 17 near the connection electrode 3 of the semiconductor chip 2 is reduced by the filler 5 and the occurrence of a stress is reduced on the peripheral portion of the connection electrode 3, thereby preventing the occurrence of cracks near the joint.Type: GrantFiled: February 18, 2010Date of Patent: April 10, 2012Assignee: Panasonic CorporationInventors: Shigeru Kondou, Yoshihiro Tomura
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Publication number: 20110279996Abstract: A multilayer wiring board is inhibited from being warped when flip-chip bonding a semiconductor device to the multilayer wiring board, thereby increasing the reliability of connecting the semiconductor assembly to a motherboard. A heat-insulating layer 10 is provided between a core board 1 and a flip-chip bonding-side insulating layer 3 in a multilayer wiring board MB1, thereby preventing thermal conduction from a heat tool, so that the amounts of thermal expansion of the core board 1 and an insulating layer 4 are minimized, resulting in reduced warpage of the multilayer wiring board MB1.Type: ApplicationFiled: November 11, 2008Publication date: November 17, 2011Inventors: Yoshihiro Tomura, Shigeru Kondou, Teppei Iwase
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Patent number: 7910406Abstract: An electronic circuit device includes at least one semiconductor element, a plurality of external connection terminals, connecting conductors electrically connecting the semiconductor element and external connection terminals, and an insulating resin covering the semiconductor element and supporting the connecting conductors integrally. The semiconductor element is buried in the insulating resin, and terminal surfaces of the external connection terminals are exposed from the insulating resin.Type: GrantFiled: October 19, 2006Date of Patent: March 22, 2011Assignee: Panasonic CorporationInventors: Kentaro Kumazawa, Shigeru Kondou, Hidenobu Nishikawa
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Publication number: 20100213609Abstract: A solder bump and a conductive connection structure are provided which can conductively connect a semiconductor chip and a substrate with high connection reliability. Filler 5 is contained in a solder bump 6 and a solder joint 17 which connect a connection electrode 3 of a semiconductor chip 2 and a substrate 11, and the filler has a larger density on the side of the connection electrode 3 than on the side of the substrate 11 in the solder joint 17. Therefore, in the cooling solidification of solder, the shrinkage of the solder joint 17 near the connection electrode 3 of the semiconductor chip 2 is reduced by the filler 5 and the occurrence of a stress is reduced on the peripheral portion of the connection electrode 3, thereby preventing the occurrence of cracks near the joint.Type: ApplicationFiled: February 18, 2010Publication date: August 26, 2010Applicant: PANASONIC CORPORATIONInventors: Shigeru Kondou, Yoshihiro Tomura
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Patent number: 7759784Abstract: A 3D circuit module which is highly reliable, easily layered and able to mount electronic components in high density is obtained by providing a support member having a frame in the periphery thereof and a recess; a coating layer for coating the frame and filling in the recess, the coating layer being made of resin material which is adhesive and has a softening temperature lower than the softening temperature of the support member; a wiring pattern formed on the coating layer, the wiring pattern including a first land on the frame, a second land on the recess, and a wiring part for connecting between the first land and the second land; and an electronic component having a projecting electrode formed on a side thereof, the electronic component being bonded to the coating layer and accommodated in the recess, with the projecting electrode connected to the second land.Type: GrantFiled: August 4, 2005Date of Patent: July 20, 2010Assignee: Panasonic CorporationInventors: Masahiro Ono, Shigeru Kondou, Kazuhiro Nishikawa, Kazuto Nishida
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Publication number: 20100084762Abstract: Memory card (1) includes at least semiconductor chip (3), circuit board (2) with semiconductor chip (3) mounted on main surface (21), having at least rigidity reducing portion (23) formed in main surface (21) or in a linear region of surface (22) opposite to the main surface, and cover portion (71) for covering semiconductor chip (3) on main surface (21) of circuit board (2), wherein circuit board (2) has a plurality of convex regions (201) which flex in a convex shape toward main surface (21) due to rigidity reducing portion (23).Type: ApplicationFiled: April 18, 2007Publication date: April 8, 2010Inventors: Hidenobu Nishikawa, Daido Komyoji, Atsunobu Iwamoto, Hiroyuki Yamada, Shuichi Takeda, Shigeru Kondou
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Publication number: 20090267214Abstract: The electronic circuit device of the present invention includes at least one semiconductor element, a plurality of external connection terminals, a connecting conductor for electrically connecting semiconductor element and external connection terminals, and an insulating resin for covering the semiconductor element and supporting the connecting conductor integrally, in which the semiconductor element is buried in the insulating resin, and the terminal surface of the external connection terminals is exposed from the insulating resin.Type: ApplicationFiled: October 19, 2006Publication date: October 29, 2009Inventors: Kentaro Kumazawa, Shigeru Kondou, Hidenobu Nishikawa
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Publication number: 20080102701Abstract: A first printed board on which a ground pattern is provided and an electronic part is mounted and a second printed board on which a ground pattern is provided and an electronic part is mounted are oppositely arranged, and circuits of the first printed board and the second printed board are connected by a connector with a frame-like shield. In the connector with a shield, a frame body is formed of an insulator such as a resin, a connection terminal is provided inside the frame body, and a conductor is provided on the entire outer periphery of the frame body. In the conductor, the shield is formed by both the ground pattern of the first printed board and the ground pattern of the second printed board. The frame body shields the electronic parts.Type: ApplicationFiled: November 22, 2005Publication date: May 1, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hiroyuki Suzuki, Kiyoshi Nakanishi, Ken Muramatsu, Tooru Saitou, Noriaki Amano, Masahiro Ono, Shigeru Kondou