Patents by Inventor Shigeru Mitsugi

Shigeru Mitsugi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiprocessor system having common memory
    Patent number: 4803618
    Abstract: A plurality of processors use a common memory under a time division control mode by way of a time division data bus. In the multiprocessor system, flip-flops are mounted for holding respective write permission flags. Also, a logic gate is employed, operative to allow the processor to write data in the common memory when both the write permission flag and the write request signal from the processor are generated simultaneously. Further, multiplexers are used so that the write operation can be achieved under the time division control mode.
    Type: Grant
    Filed: January 17, 1986
    Date of Patent: February 7, 1989
    Assignee: Panafacom Limited
    Inventors: Noboru Ita, Shigeru Mitsugi