Patents by Inventor Shigeru Okamoto

Shigeru Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5757638
    Abstract: A power supply apparatus comprises a housing having a panel. A power supply circuit is disposed in the housing. The power supply circuit supplies power to a load. A control circuit controls the operation of the power supply circuit in accordance with control information. The control circuit is formed on a printed circuit board mounted on the panel in the housing. The printed circuit board is provided with a control which can be operated from outside the housing. The control provides the control information in response to operation thereof from outside the panel.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: May 26, 1998
    Assignee: Sansha Electric Manufacturing Company, Limited
    Inventors: Masao Katooka, Toru Arai, Shigeru Okamoto, Kenzo Danjo, Masaharu Tanaka
  • Patent number: 5751568
    Abstract: A power supply apparatus for arc-utilizing equipment includes a first converter for converting a received AC voltage to a DC voltage.An inverter converts the DC voltage to a high-frequency voltage, which is applied to a voltage-transformer with primary and second windings. A voltage-transformed high-frequency voltage induced in the secondary winding is converted to a DC voltage in a second converter, which is developed between two output terminals. The respective ones of the two output terminals are connected to a torch electrode of the arc-utilizing equipment and a workpiece. A bypass capacitor and a high-frequency voltage generator circuit are serially connected between the two output terminals. A control circuit controls the high-frequency voltage generator circuit and the inverter circuit. The bypass capacitor is connected directly between one of the two output terminals and the high-frequency voltage generator circuit.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: May 12, 1998
    Assignee: Sansha Electric Manufacturing Company, Limited
    Inventors: Kenzo Danjo, Atsushi Kinoshita, Shigeru Okamoto, Haruo Moriguchi, Takashi Hashimoto
  • Patent number: 5736192
    Abstract: An embedded electroconductive layer is disclosed which comprises an opening part or a depressed part 3 formed in an insulating film 2 on a substrate 1, a barrier layer for covering the opening part or the depressed part, a metal growth promoting layer 5 on the barrier layer, and an electroconductive layer 6 embedded in the opening part or the depressed part via the barrier layer 4 and the metal growth promoting layer 5.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: April 7, 1998
    Assignee: Fujitsu Limited
    Inventor: Shigeru Okamoto
  • Patent number: 5324669
    Abstract: The impurity density of a photoelectric transducer n-layer (7) and the impurity density of a p-layer ( 6 ) of an impurity region in which the electric transducer (7) and a transfer channel (9) are formed, are each distributed to have its maximum value in a more interior part from the surface of a semiconductor substrate (5). Alternatively, i) a thin, high-density p-layer (34) and ii) a thick, low-density p-layer (33) of an impurity region in which the electric transducer (7) and the transfer channel (9 ) are formed may be formed. Each minimum potential in these two p-layers (33, 34) is made to have a different dependence on the voltage applied to an n-type semiconductor substrate ( 5). The thick, low-density p-layer ( 33 ) is formed in such a way that it comes into contact with part of the photoelectric transducer n-layer (7) at its bottom portion.
    Type: Grant
    Filed: August 12, 1993
    Date of Patent: June 28, 1994
    Assignee: Matsushita Electronics Corporation
    Inventors: Takao Kuroda, Sumio Terakawa, Shigeru Okamoto, Katsuya Ishikawa
  • Patent number: 5262661
    Abstract: The impurity density of a photoelectric transducer n-layer (7) and the impurity density of a p-layer (6) of an impurity region in which the electric transducer (7) and a transfer channel (9) are formed, are each distributed to have its maximum value in a more interior part from the surface of a semiconductor substrate (5). Alternatively, i) a thin, high-density p-layer (34) and ii) a thick, low-density p-layer (33) of an impurity region in which the electric transducer (7) and the transfer channel (9) are formed may be formed. Each minimum potential in these two p-layers (33, 34) is made to have a different dependence on the voltage applied to an n-type semiconductor substrate (5). The thick, low-density p-layer (33) is formed in such a way that it comes into contact with part of the photoelectric transducer n-layer (7) at its bottom portion.
    Type: Grant
    Filed: June 6, 1991
    Date of Patent: November 16, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takao Kuroda, Sumio Terakawa, Shigeru Okamoto, Katsuya Ishikawa
  • Patent number: D377335
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: January 14, 1997
    Assignee: Sansha Electric Manufacturing Company, Limited
    Inventors: Masao Katooka, Toru Arai, Shigeru Okamoto, Kenzo Danjo, Masaharu Tanaka
  • Patent number: D386148
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: November 11, 1997
    Assignee: Sansaha Electric Manufacturing Co., Ltd.
    Inventors: Masao Katooka, Toru Arai, Shigeru Okamoto, Kenzo Danjo, Masaharu Tanaka