Patents by Inventor Shigeru Sekine
Shigeru Sekine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11983967Abstract: A control apparatus (2000) computes a waiting time index value for each of a plurality of gates (20) for entering an area (10). The control apparatus (2000) detects, from among the plurality of gates (20), a first gate (20) and a second gate (20) of which relation between the waiting time index values satisfies a first criterion. Herein, the waiting time index value of the first gate (20) is greater than the waiting time index value of the second gate (20). The control apparatus (2000) causes a terminal (30) associated with the first gate (20) to output priority use information, which allows prioritized use of the second gate (20).Type: GrantFiled: January 21, 2020Date of Patent: May 14, 2024Assignee: NEC CORPORATIONInventors: Hirofumi Inoue, Shin Tominaga, Shigeki Shinoda, Yuzo Senda, Shigeru Sekine
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Patent number: 11847592Abstract: A required time prediction apparatus (2000) acquires utilization facility information and assumed date and time information. The utilization facility information is information enabling to determine a departure facility and a destination facility. The assumed date and time information is information enabling to determine an assumed departure date and time assuming departure from the departure facility or an assumed arrival date and time assuming arrival at the destination facility. The apparatus (2000) estimates a waiting time at each facility being present between the departure facility and the destination facility, regarding a case of assuming departure from the departure facility at the assumed departure date and time, or a case of assuming arrival at the destination facility at the assumed arrival date and time. Then, the apparatus (2000) computes, based on the estimated waiting time, a predicted required time from departure from the departure facility to arrival at the destination facility.Type: GrantFiled: January 22, 2020Date of Patent: December 19, 2023Assignee: NEC CORPORATIONInventors: Hirofumi Inoue, Shin Tominaga, Shigeki Shinoda, Yuzo Senda, Shigeru Sekine
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EMOTION ESTIMATION APPARATUS, EMOTION ESTIMATION METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
Publication number: 20230089561Abstract: An emotion estimation apparatus (10) includes an emotion acquisition unit (110) and an output unit (120). The emotion acquisition unit (110) acquires, for each of a plurality of regions within a facility, an estimated value related to magnitude of specific emotion being felt by at least one person being present in the region. The emotion acquisition unit (110) acquires the estimated value by processing an image acquired by capturing the region. When there is a region where the estimated value satisfies a criterion, the output unit (120) outputs information that determines the region. The criterion is set for each of the plurality of regions.Type: ApplicationFiled: March 11, 2020Publication date: March 23, 2023Applicant: NEC CorporationInventors: Shigeru SEKINE, Tsuyoshi Shibata -
Publication number: 20230058114Abstract: An operation control apparatus (10) includes a data acquisition unit (110) and an apparatus control unit (120). The data acquisition unit (110) acquires first congestion data. In a present example, the data acquisition unit (110) generates the first congestion data by processing an image generated by an image capture unit. The image processing performed herein includes, for example, processing of counting the number of persons in a crowd. The apparatus control unit (120) controls an apparatus to be controlled by using the first congestion data. For example, when the first congestion data exceed a reference value, the apparatus control unit (120) reduces the number of operating apparatuses to be controlled and lowers a response speed of the apparatus to be controlled in such a way that the number of persons moving from a second area to a first area per unit time decreases.Type: ApplicationFiled: February 20, 2020Publication date: February 23, 2023Applicant: NEC CorporationInventors: Shigeru SEKINE, Tsuyoshi Shibata
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Publication number: 20230046797Abstract: A required time prediction apparatus (2000) acquires utilization facility information and assumed date and time information. The utilization facility information is information enabling to determine a departure facility and a destination facility. The assumed date and time information is information enabling to determine an assumed departure date and time assuming departure from the departure facility or an assumed arrival date and time assuming arrival at the destination facility. The apparatus (2000) estimates a waiting time at each facility being present between the departure facility and the destination facility, regarding a case of assuming departure from the departure facility at the assumed departure date and time, or a case of assuming arrival at the destination facility at the assumed arrival date and time. Then, the apparatus (2000) computes, based on the estimated waiting time, a predicted required time from departure from the departure facility to arrival at the destination facility.Type: ApplicationFiled: January 22, 2020Publication date: February 16, 2023Applicant: NEC CorporationInventors: Hirofumi INOUE, Shin TOMINAGA, Shigeki SHINODA, Yuzo SENDA, Shigeru SEKINE
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Publication number: 20230033538Abstract: A control apparatus (2000) computes a waiting time index value for each of a plurality of gates (20) for entering an area (10). The control apparatus (2000) detects, from among the plurality of gates (20), a first gate (20) and a second gate (20) of which relation between the waiting time index values satisfies a first criterion. Herein, the waiting time index value of the first gate (20) is greater than the waiting time index value of the second gate (20). The control apparatus (2000) causes a terminal (30) associated with the first gate (20) to output priority use information, which allows prioritized use of the second gate (20).Type: ApplicationFiled: January 21, 2020Publication date: February 2, 2023Applicant: NEC CorporationInventors: Hirofumi INOUE, Shin Tominaga, Shigeki Shinoda, Yuzo Senda, Shigeru Sekine
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Patent number: 7551612Abstract: A switch station including an ATM switch; a memory storing control data for operations of the switch station; an intra-station device, accommodating a subscriber line, performing communication operation on subscriber ATM cell; a control processor generating control information in link access protocol (LAP) format; and an interface unit converting LAP control information into ATM cell to the intra-station device through the ATM switch, wherein the control information is communicated according to LAP, the intra-station device receives the control information and transmits a direct memory access request to obtain control data stored in the memory, the interface unit obtains and converts the data format of the control data into ATM cell to transmit to the intra-station device through the switch, and the intra-station device performs the communication operation on the subscriber ATM cell based on the control data received through the switch.Type: GrantFiled: March 26, 1999Date of Patent: June 23, 2009Assignee: Fujitsu LimitedInventors: Yasusi Kobayashi, Yoshihiro Watanabe, Hiroshi Nishida, Masami Murayama, Naoyuki Izawa, Yasuhiro Aso, Yoshihiro Uchida, Hiromi Yamanaka, Jin Abe, Yoshihisa Tsuruta, Yoshiharu Kato, Satoshi Kakuma, Shiro Uriu, Noriko Samejima, Eiji Ishioka, Shigeru Sekine, Yoshiyuki Karakawa, Atsushi Kagawa, Mikio Nakayama, Miyuki Kawataka, Satoshi Esaka, Nobuyuki Tsutsui, Fumio Hirase, Atsuko Suzuki, Shouji Kohira, Kenichi Okabe, Takashi Hatano, Yasuhiro Nishikawa, Jun Itoh, Shinichi Araya
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Patent number: 6654385Abstract: A message division communication method and system are disclosed for a communication system comprising a host, an intermediate device connected to the host through a high-speed bus and a remote device connected to the intermediate device or the host through a low-speed bus. A message is transmitted in such a manner that the host designates and notifies the remote device of a maximum message length determined in a way corresponding to the transmission rate of the low-speed bus and divides the message into division messages each not exceeding the maximum message length thereby to transmit and receive the division messages between the host and the remote device. Even with a communication system in which low-speed and high-speed buses coexist, a message can be transmitted and received by a common communication control scheme.Type: GrantFiled: July 27, 1999Date of Patent: November 25, 2003Assignee: Fujitsu LimitedInventors: Hiromi Odaka, Sumie Morita, Shigeru Sekine, Eiji Ishioka, Hisashi Koga
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Publication number: 20030179712Abstract: The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S11). The output message identifier MID is reserved (S12), and the tag information and output MID are assigned to the BOM (S13). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S31 and S32). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S41 and S42). Then, the output MID is released (S43).Type: ApplicationFiled: March 26, 1999Publication date: September 25, 2003Inventors: YASUSI KOBAYASHI, YOSHIHIRO WATANABE, HIROSHI NISHIDA, MASAMI MURAYAMA, NAOYUKI IZAMA, YASUHIRO ASO, YOSHIHIRO UCHIDA, HIROMI YAMANAKA, JIN ABE, YOSHIHISA TSURUTA, YOSHIHARU KATO, SATOSHI KAKUMA, SHIRO URIU, NORIKO SAMEJIMA, EIJI ISHIOKA, SHIGERU SEKINE, YOSHIYUKI KARAKAWA, ATSUSHI KAGAWA, MIKIO NAKAYAMA, MIYUKI KAWATAKA, SATOSHI ESAKA, NOBUYUKI TSUTSUI, FUMIO HIRASE, ATSUKO SUZUKI, SHOUJI KOHIRA, KENICHI OKABE, TAKASHI HATANO, YASUHIRO NISHIKAWA, JUN ITOH, SHINICHI ARAYA
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Patent number: 6466576Abstract: In an ATM switching unit, action information indicative of a cell of a presently operable system is stored into such a cell received from a line which is used as the line for the presently operable system, among cells received from duplicated lines, and also standby information indicative of a cell of a spare operation system is stored into such a cell received from a line which is used as the line for the spare operation system in an individual unit. Thereafter, the cells are transferred to a common unit. In this common unit, the cell into which the standby information has been stored is discarded by an IVC unit. Subsequently, transfer destination address information of the cell into which the action information has been stored is specified, and this specified cell is transferred to an output path thereof.Type: GrantFiled: March 23, 1998Date of Patent: October 15, 2002Assignee: Fujitsu LimitedInventors: Shigeru Sekine, Eiji Ishioka, Hiromi Odaka
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Publication number: 20020075798Abstract: In an ATM switching unit, action information indicative of a cell of a presently operable system is stored into such a cell received from a line which is used as the line for the presently operable system, among cells received from duplicated lines, and also standby information indicative of a cell of a spare operation system is stored into such a cell received from a line which is used as the line for the spare operation system in an individual unit. Thereafter, the cells are transferred to a common unit. In this common unit, the cell into which the standby information has been stored is discarded by an IVC unit. Subsequently, transfer destination address information of the cell into which the action information has been stored is specified, and this specified cell is transferred to an output path thereof.Type: ApplicationFiled: March 23, 1998Publication date: June 20, 2002Inventors: SHIGERU SEKINE, EIJI ISHIOKA, HIROMI ODAKA
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Patent number: 6333932Abstract: The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S11). The output message identifier MID is reserved (S12), and the tag information and output MID are assigned to the BOM (S13). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S31 and S32). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S41 and S42). Then, the output MID is released (S43).Type: GrantFiled: August 21, 1995Date of Patent: December 25, 2001Assignee: Fujitsu LimitedInventors: Yasusi Kobayasi, Yoshihiro Watanabe, Hiroshi Nishida, Masami Murayama, Naoyuki Izawa, Yasuhiro Aso, Yoshihiro Uchida, Hiromi Yamanaka, Jin Abe, Yoshihisa Tsuruta, Yoshiharu Kato, Satoshi Kakuma, Shiro Uriu, Noriko Samejima, Eiji Ishioka, Shigeru Sekine, Yoshiyuki Karakawa, Atsushi Kagawa, Mikio Nakayama, Miyuki Kawataka, Satoshi Esaka, Nobuyuki Tsutsui, Fumio Hirase, Atsuko Suzuki, Shouji Kohira, Kenichi Okabe, Takashi Hatano, Yasuhiro Nishikawa, Jun Itoh, Shinichi Araya
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Patent number: 6272454Abstract: An RS232C driver inside target firmware controls an RS232C interface. An OS debugger steals an input to and an output from another function block that is the actual target firmware, and exchanges that input and output with the RS232C driver 1005. This configuration makes it possible to easily connect a device that executes the target firmware to, for example, a personal computer, using a general purpose RS232C interface, and makes it possible to easily obtain debugging operation using the PC side debugger.Type: GrantFiled: October 29, 1998Date of Patent: August 7, 2001Assignee: Fujitsu LimitedInventors: Sumie Morita, Shigeru Sekine, Eiji Ishioka, Tomoki Someya, Noboru Ise
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Patent number: 6266325Abstract: In a path audit control method, (1) a unit (a discrete unit or common unit) within a switch holds bitmap information indicating whether each channel identifier is being used to establish a path; (2) a central controller sends the unit bitmap information indicating whether each channel identifier has been used to establish a path; (3) the unit compares bitmap information which it itself is holding with bitmap information that has been sent from the central controller; and (4) if the bitmap information held by the unit and the bitmap information that has been sent from the central controller do not match, the central controller and the unit cooperate to execute matching processing in such a manner that the compared items of bitmap information will be made to match.Type: GrantFiled: February 12, 1998Date of Patent: July 24, 2001Assignee: Fujitsu LimitedInventors: Eiji Ishioka, Sumie Morita, Shigeru Sekine, Hiromi Odaka, Yoshihiro Watanabe, Toshiaki Oishi
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Patent number: 6191938Abstract: An electronic apparatus is provided with a base unit and a display unit. The base unit has an opening formed on the upper surface. The display unit incorporates a display device and supported by the base unit. The display unit is rotatable between a first position where it is tilted down in such a manner as to cover the upper surface of the base unit and a second position where it is raised in such a manner as to expose the upper surface. The display unit includes a projection portion which is inserted into the opening when the display unit is rotated to the first position. A switch for turning the display device on or off is arranged inside the base unit. The switch includes an operation element opposed to the opening of the base unit. When the display unit is rotated to the first position, the operation element is pushed by the projection portion, thereby turning off the display device.Type: GrantFiled: February 23, 1998Date of Patent: February 20, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Keizo Ohgami, Kazuyuki Matsuda, Takaichi Kobayashi, Kazuya Shibasaki, Hiroshi Nakamura, Shigeru Sekine, Hironori Ito, Kenichi Ishikawa, Tadamichi Shimohira, Moriya Gibo
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Patent number: 6064179Abstract: A battery charge circuit using a constant voltage/constant current to power charge a plurality of battery packs, a current detection circuit to detect a charge current according to a predetermined value, and control mechanisms to maintain a constant voltage charge mode when the charge current value drops below a set value within the battery pack.Type: GrantFiled: February 25, 1999Date of Patent: May 16, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Hironori Ito, Shigeru Sekine, Masahiko Kasashima, Hisao Tsukazawa, Yuichiro Hino, Shizuo Morioka, Nobuyuki Hosoya, Yoshiaki Ukiya, Katsuo Ozawa, Hirohito Motomiya, Masaru Harashima, Masahiko Hagiwara, Masanori Morita, Akihiko Uchida, Naoki Tashiro, Masayasu Tanaka, Keiichi Mitsui, Naoki Isooka
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Patent number: 6060864Abstract: In a battery-driven portable computer, a battery pack is constituted by m battery sets connected in series each including n lithium-ion secondary battery cells connected in parallel. A voltage monitor for monitoring the voltage of the terminal electrode of each battery set and a charger for independently appropriately charging each battery set in accordance with a monitor result are arranged, thereby realizing battery driving by a lithium-ion secondary battery pack having a large capacity. A computer system monitors the voltages of the battery cells which are part of a secondary battery by comparing the battery voltages with a predetermined voltage value in order to detect overdischarge (undervoltage) or overcharge (overvoltage), outputs this information outside of the battery pack, and terminates processing prior to a circuit disconnect.Type: GrantFiled: February 25, 1999Date of Patent: May 9, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Hironori Ito, Shigeru Sekine, Masahiko Kasashima, Hisao Tsukazawa, Yuichiro Hino, Shizuo Morioka, Nobuyuki Hosoya, Yoshiaki Ukiya, Katsuo Ozawa, Hirohito Motomiya, Masaru Harashima, Masahiko Hagiwara, Masanori Morita, Akihiko Uchida, Naoki Tashiro, Masayasu Tanaka, Keiichi Mitsui, Naoki Isooka
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Patent number: 5953334Abstract: An ATM (asynchronous transfer mode) switching system is capable of performing a charging process, while suppressing a data communication amount used to acquire data required for a charging process. The ATM switching system is arranged by comprising: a charging data processing unit for counting a quantity of transmitted ATM cells with respect to each of transmission destinations, and for notifying the count value as charging data; a charging information processing unit for requesting the charging data processing unit to notify the charging data, and for notifying charging information produced based on the charging data; and a control unit for requesting the charging information processing unit to notify the charging information.Type: GrantFiled: July 15, 1996Date of Patent: September 14, 1999Assignee: Fujitsu LimitedInventors: Sumie Morita, Yuzou Kawamura, Emi Hata, Shigeru Sekine
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Patent number: 5903131Abstract: In a battery-driven portable computer, a battery pack is constituted by m battery sets connected in series each including n lithium-ion secondary battery cells connected in parallel. A voltage monitor for monitoring the voltage of the terminal electrode of each battery set and a charger for independently appropriately charging each battery set in accordance with a monitor result are arranged, thereby realizing battery driving by a lithium-ion secondary battery pack having a large capacity.Type: GrantFiled: January 20, 1998Date of Patent: May 11, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Shigeru Sekine, Masahiko Kasashima, Hisao Tsukazawa, Shizuo Morioka, Nobuyuki Hosoya, Yoshiaki Ukiya, Hirohito Motomiya, Masaru Harashima, Masanori Morita, Akihiko Uchida, Masayasu Tanaka, Keiichi Mitsui
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Patent number: 5898425Abstract: A connector mounted on a system board has terminals the number of which corresponds to the total sum of key matrix control signal lines and pointing stick control signal lines. The key matrix control signal lines and pointing stick control signal lines are connected together to the connector. Both a keyboard interface and a pointing stick interface can thus be achieved by the single connector, resulting in improvement in mounting efficiency, decrease in cost and simplification in assembly process.Type: GrantFiled: February 28, 1996Date of Patent: April 27, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Shigeru Sekine