Patents by Inventor Shigeta Kuninobu

Shigeta Kuninobu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954728
    Abstract: According to one embodiment, an information processing device includes processing circuitry configured to calculate a first index based on a plurality of pieces of first prediction data on an amount of electric power generated by a first electric power generation resource and a penalty imposed when an amount of electric power supplied to an electric power system is insufficient or excessive for a first amount of electric power which corresponds to a planned value of electric power generation amount, the first index being an index related to a yield obtained in a case that the first amount of electric power is tentatively bid in a first market; and determine a second amount of electric power to be bid in the first market based on the first index.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Energy Systems & Solutions Corporation
    Inventors: Hideyuki Aisu, Takufumi Yoshida, Shigeta Kuninobu, Hiromasa Shin, Yoshiaki Shiga, Kotaro Kimura, Yuki Hayashi
  • Patent number: 11590970
    Abstract: According to one embodiment, a deadlock detection device includes a combining calculator and a deadlock determiner. The combining calculator performs selecting a mobile vehicle or combined mobile vehicles from among mobile vehicles, based on a traveling path configuration graph and first state information, going forward the selected mobile vehicle to go forward on traveling path configuration graph and combining the selected mobile vehicle to another mobile vehicle or another combined mobile vehicles at a back of the other mobile vehicle or the other combined mobile vehicles, iterating a process of the selecting, the going and combining. The deadlock determiner determines that a deadlock occurs if not all the mobile vehicles have been combined by the combining calculator, and determines that no deadlock occurs if all the mobile vehicles have been combined.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: February 28, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeta Kuninobu, Hideyuki Aisu, Tomoshi Otsuki
  • Publication number: 20220261756
    Abstract: According to one embodiment, an information processing apparatus includes processing circuitry. The processing circuitry is configured to combine a sell condition under which a first dealer sells a product and a buy condition under which a second dealer buys the product on a basis of information of a first transport medium to transport the product, and generate matching information including the sell condition and the buy condition combined each other; and assign a transport of the product to the first transport medium by associating the transport with the first transport medium and perform scheduling of the transport on a basis of the matching information.
    Type: Application
    Filed: September 9, 2021
    Publication date: August 18, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeta KUNINOBU, Keiichi HANDA, Takufumi YOSHIDA
  • Publication number: 20220156828
    Abstract: According to one embodiment, an information processing device includes processing circuitry configured to calculate a first index based on a plurality of pieces of first prediction data on an amount of electric power generated by a first electric power generation resource and a penalty imposed when an amount of electric power supplied to an electric power system is insufficient or excessive for a first amount of electric power which corresponds to a planned value of electric power generation amount, the first index being an index related to a yield obtained in a case that the first amount of electric power is tentatively bid in a first market; and determine a second amount of electric power to be bid in the first market based on the first index.
    Type: Application
    Filed: September 9, 2021
    Publication date: May 19, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Hideyuki AISU, Takufumi YOSHIDA, Shigeta KUNINOBU, Hiromasa SHIN, Yoshiaki SHIGA, Kotaro KIMURA, Yuki HAYASHI
  • Patent number: 11321301
    Abstract: According to an embodiment of the present invention, a probability to achieve a purpose is increased in a case where information is intermittently allocated to a plurality of elements. An information processing apparatus according to an embodiment of the present invention is an information processing apparatus that allocates information to respective elements included in a first set and includes an allocator. The allocator uses a first subset and a second subset, and allocates the information to at least one element included in the first subset. The first subset is constituted by elements which are included in the first set and in which information allocation may be performed at a present time. The second subset is constituted by elements which are included in the first set and in which the information allocation is not performed at the present time.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: May 3, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Hidekazu Saito, Shigeta Kuninobu, Takuma Akagi, Koji Ehara
  • Publication number: 20210004362
    Abstract: According to an embodiment of the present invention, a probability to achieve a purpose is increased in a case where information is intermittently allocated to a plurality of elements. An information processing apparatus according to an embodiment of the present invention is an information processing apparatus that allocates information to respective elements included in a first set and includes an allocator. The allocator uses a first subset and a second subset, and allocates the information to at least one element included in the first subset. The first subset is constituted by elements which are included in the first set and in which information allocation may be performed at a present time. The second subset is constituted by elements which are included in the first set and in which the information allocation is not performed at the present time.
    Type: Application
    Filed: March 10, 2020
    Publication date: January 7, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Hidekazu SAITO, Shigeta Kuninobu, Takuma Akagi, Koji Ehara
  • Patent number: 10726170
    Abstract: A simulation-machine includes: a LP problem creator creates a linear programming problem in which a transport amount per unit time between respective processing machines handling an nth process and a processing machine handling an (n+1)th process is set as a variable, based on layout data, process data, machine data and production volume data, the layout data including transport sections, a load position, a transport cost and an arrangement position in the transport path, the process data including a sequence of processing the processes, the machine data including association information between the process and the processing machine, and the production volume data including a load amount at the load position; and a calculator calculates a transport amount per unit time for each of the transport sections by using the transport amount per unit time between the processing machines in all the processes included in a solution of the linear programming problem.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: July 28, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigeta Kuninobu
  • Publication number: 20200139964
    Abstract: According to one embodiment, a deadlock detection device includes a combining calculator and a deadlock determiner. The combining calculator performs selecting a mobile vehicle or combined mobile vehicles from among mobile vehicles, based on a traveling path configuration graph and first state information, going forward the selected mobile vehicle to go forward on traveling path configuration graph and combining the selected mobile vehicle to another mobile vehicle or another combined mobile vehicles at a back of the other mobile vehicle or the other combined mobile vehicles, iterating a process of the selecting, the going and combining. The deadlock determiner determines that a deadlock occurs if not all the mobile vehicles have been combined by the combining calculator, and determines that no deadlock occurs if all the mobile vehicles have been combined.
    Type: Application
    Filed: September 11, 2019
    Publication date: May 7, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeta KUNINOBU, Hideyuki AISU, Tomoshi OTSUKI
  • Publication number: 20170185703
    Abstract: A simulation-machine includes: a LP problem creator creates a linear programming problem in which a transport amount per unit time between respective processing machines handling an nth process and a processing machine handling an (n+1)th process is set as a variable, based on layout data, process data, machine data and production volume data, the layout data including transport sections, a load position, a transport cost and an arrangement position in the transport path, the process data including a sequence of processing the processes, the machine data including association information between the process and the processing machine, and the production volume data including a load amount at the load position; and a calculator calculates a transport amount per unit time for each of the transport sections by using the transport amount per unit time between the processing machines in all the processes included in a solution of the linear programming problem.
    Type: Application
    Filed: September 19, 2016
    Publication date: June 29, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Shigeta KUNINOBU
  • Publication number: 20160189072
    Abstract: A new operation is added to an operation plan while reducing the change amount in switch costs before and after change. An operation-plan scheduling device according to one embodiment is provided with a reader to read an operation plan, switch-cost information, information of an additional operation; a graph-network creator to create a graph network by setting intervals between operations allocated to the operation executors as an interval vertices, connecting edges among an entry vertex, an interval vertex, and an exit vertex, and setting weight variables on the edges; a path selector to select a path based on edge weight sums of the paths from the entry vertex to the exit vertex of the graph network; and an operation-plan creator to exchange operations between the operation executors in accordance with the selected path and allocate the additional operation to the interval created by the exchange.
    Type: Application
    Filed: March 10, 2016
    Publication date: June 30, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke KUROKI, Shigeta KUNINOBU
  • Publication number: 20160033961
    Abstract: A production control support apparatus according to one embodiment includes processing circuitry. The processing circuitry calculates a plurality of different functions depending on respective regions of the upper bound value based on: a number of machines existing in each process; a time interval of the semi-finished products arriving at the production line; a statistical dispersion of the time interval; a time necessary for one machine in each process to process one semi-finished product; and a statistical dispersion of the necessary time; and thereby obtains a relationship between the upper bound value and the blocking probability for each of the regions, and an association of the functions of the respective regions is a function where the blocking probability monotonically decreases depending on an increase of the upper bound value.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 4, 2016
    Inventors: Shigeta KUNINOBU, Takufumi YOSHIDA
  • Patent number: 9129232
    Abstract: According to one embodiment, a determination tree generating apparatus includes a determination unit, a condition generating unit, a determining unit, and a point branch generating unit. The determination unit provisionally and sequentially determines all component categories to be classification component categories for a first point of a determination tree. The point branch generating unit generates a first point assigned to a classification component category, and generates component names to be assigned to one or more branches leading from an assigned first point to one or more child points.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: September 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigeta Kuninobu
  • Patent number: 9063527
    Abstract: There is provided a scheduling device in which a dividing unit selects a predetermined number of semi-finished products from a head out of a semi-finished products for which scheduling order was determined, and divides selected semi-finished products according to a plurality of patterns to generate a plurality of set sequences, the set sequences each being a sequence of one or more sets each including at least one semi-finished product; a calculating unit assigns, for each of the set sequences, the sets included in the set sequence to different ones of the processing devices so that processing of all the semi-finished products are completed fastest, and finds the set sequence that completion time is completed fastest among the set sequences; and a determining unit determines that a top set in the set sequence found by the calculating unit is processed by the processing device assigned thereto.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: June 23, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeta Kuninobu, Yusuke Kuroki
  • Publication number: 20130253680
    Abstract: There is provided a scheduling device in which a dividing unit selects a predetermined number of semi-finished products from a head out of a semi-finished products for which scheduling order was determined, and divides selected semi-finished products according to a plurality of patterns to generate a plurality of set sequences, the set sequences each being a sequence of one or more sets each including at least one semi-finished product; a calculating unit assigns, for each of the set sequences, the sets included in the set sequence to different ones of the processing devices so that processing of all the semi-finished products are completed fastest, and finds the set sequence that completion time is completed fastest among the set sequences; and a determining unit determines that a top set in the set sequence found by the calculating unit is processed by the processing device assigned thereto.
    Type: Application
    Filed: September 14, 2012
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeta Kuninobu, Yusuke Kuroki
  • Publication number: 20120173532
    Abstract: According to one embodiment, a determination tree generating apparatus includes a determination unit, a condition generating unit, a determining unit, and a point branch generating unit. The determination unit provisionally and sequentially determines all component categories to be classification component categories for a first point of a determination tree. The point branch generating unit generates a first point assigned to a classification component category, and generates component names to be assigned to one or more branches leading from an assigned first point to one or more child points.
    Type: Application
    Filed: March 15, 2012
    Publication date: July 5, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shigeta KUNINOBU
  • Publication number: 20080104567
    Abstract: There is provided an apparatus that creates a component allocation plan for an electronic apparatus including first and second allocation layers in which components are allocated, including: a storage configured to store first and second component information indicating sizes of a plurality of first components and a plurality of second components to be allocated in the first and second allocation layer; an allocation order determiner configured to determine first and second allocation orders in which the first and second components are allocated for each layer; an allocation strategy determiner configured to determine first and second allocation strategies by which the first and second components are allocated, which are different each other; and a component allocating unit configured to allocate the first and second components in the first and second allocation layer in accordance with the first and second allocation orders and the first and second allocation strategies.
    Type: Application
    Filed: October 26, 2007
    Publication date: May 1, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeta Kuninobu, Keiichi Handa
  • Publication number: 20080016292
    Abstract: An access controller includes an access control cache configured to store access control data that associates an address range with an access permission. The access control cache reads the access control data by selecting a cache line. A line decision device receives an object code of an assembler instruction to be executed by a CPU and decides the cache line to be selected for accessing the access control cache based on the object code. A cache determination device determines a cache hit in a case where a memory address to be accessed by the assembler instruction is included in the address range, and outputs corresponding access permission.
    Type: Application
    Filed: June 22, 2007
    Publication date: January 17, 2008
    Inventors: Shigeta Kuninobu, Akinori Ohta, Hiromasa Shin
  • Publication number: 20070079283
    Abstract: There is provided with a program generation method, including: inputting a source program; inputting a memory protection policy in which functions included in the source program are classified into either of a plurality of domains each assigned an access control table; generating information which represents a relation between each global variable in the source program and domains utilizing the each global variable; every global variable, dividing domains utilizing the global variable into one or more high-order domains and one or more low-order domains, every global variable; every global variable, adding to the source program an instruction which sets access restriction on the global variable to reading and writing permission in access control tables of the high-order domains; and every global variable, adding to the source program an instruction which sets access restriction on the global variable to reading permission in access control tables of the low-order domains.
    Type: Application
    Filed: September 1, 2006
    Publication date: April 5, 2007
    Inventors: Shigeta Kuninobu, Hiromasa Shin
  • Publication number: 20070050586
    Abstract: In a region switching table, address regions covering a memory space are defined, and operations which can access the regions in domains corresponding to components of a program are listed. A domain number which indicates a domain corresponding to a component of the program under execution, and a region number which indicates a region including an address which is accessed immediately before are held in respective registers. The apparatus includes an access check unit which issues a first interruption, if the processor request address (VA) falls outside a region boundary. The access check unit also issues a second interruption, if the processor request operation code (OP) is not permitted according to a permission attribute corresponding to the domain number of the region including the processor request address (VA). The access check unit writes interrupt factors in a register, if the first interruption or the second interruption has been occurred.
    Type: Application
    Filed: August 25, 2006
    Publication date: March 1, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiromasa Shin, Shigeta Kuninobu