Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.

Abstract: On a glass substrate of a liquid crystal display device, electrode parts to which metallic electrodes (bumps) of an IC circuit are connected from an upper part are formed. The electrode parts are formed by opening an interlayer dielectric film at parts corresponding to metal wiring and forming land shaped electrode pads in the opening parts. In this invention, the planar forms of the electrode pads are smaller than the opening parts of the interlayer dielectric film. Thus, the planarization of the peripheral surfaces around the electrode parts is improved. Accordingly, integrated circuit devices (IC) or semiconductor chips can be connected with high reliability.

Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.

Abstract: A thin film transistor (TFT) is provided with a precisely, lightly doped drain (LDD) structure formed on a substrate of insulators, such as a glass sheet. A method of making the TFT and a liquid crystal display device with the same are disclosed. The TFT with the LDD structure include a side wall and a gate insulation layer. An intermediate layer is provided between the side wall and the gate insulation layer. The intermediate layer is different in layer property from the side wall. When the side wall is formed by an anisotropic etching process, the etching can be stopped on the surface of intermediate layer. As a result, the gate insulation layer and the substrate are protected against the etching.

Abstract: A thin film transistor (TFT) is provided with a precisely, lightly doped drain (LDD) structure formed on a substrate of insulators, such as a glass sheet. A method of making the TFT and a liquid crystal display device with the same are disclosed. The TFT with the LDD structure include a side wall and a gate insulation layer. An intermediate layer is provided between the side wall and the gate insulation layer. The intermediate layer is different in layer property from the side wall. When the side wall is formed by an anisotropic etching process, the etching can be stopped on the surface of intermediate layer. As a result, the gate insulation layer and the substrate are protected against the etching.

Abstract: A process of producing a thin film transistor of a liquid crystal display device according to the present invention comprises the steps of forming a semiconductor layer on an insulation substrate, stacking an insulation film and a conductive layer on the semiconductor layer, patterning the conductive layer to form a gate electrode, reducing a width of a mask used at formation of the gate electrode in a prescribed amount to form an offset region, implanting highly concentrated impurity ions into a part of the semiconductor layer where there are not the mask or the conductive layer to form an N.sup.+ -polysilicon layer, re-etching the conductive layer by using the mask used at formation of the gate electrode made narrower by the offset region, and implanting low concentrated impurity ions into the semiconductor layer below the conductor region removed by re-etching to form an N.sup.- -polysilicon layer.

Abstract: A thin film transistor includes an amorphous silicon layer formed on a substrate, a gate insulator formed on the amorphous silicon layer, a gate electrode formed on the gate insulator, source and drain contact regions of polycrystalline silicon formed in the amorphous silicon layer on both sides of the gate electrode, and source and drain electrodes formed respectively in contact with the source and drain contact regions. Particularly, the gate insulator includes a first insulating film which covers the amorphous silicon layer as a reflectivity reducing film for reducing the optical reflectivity of the amorphous silicon layer and the source and drain contact regions are formed by an annealing process for applying a laser beam to the amorphous silicon layer via the first insulating film.