Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on a surface of the insulating layer such that the conductor layer includes a conductor pad, and a solder resist layer formed on the surface of the insulating layer such that the solder resist layer is covering the conductor layer and having an opening exposing the conductor pad. The conductor pad of the conductor layer has a substantially rectangular planar shape such that the conductor pads has a main surface, a pair of long sides, a pair of short sides and four corner portions, and the solder resist layer is formed such that the opening is exposing side surfaces at the long sides and 50% or more of the main surface and that the solder resist layer is covering side surfaces at the short sides.

Abstract: A method for manufacturing a multilayer wiring substrate includes forming a resist layer having mask pattern, forming a conductor layer having conductor pattern using the resist layer, removing the resist layer, forming an insulating layer on the conductor layer such that the insulating layer is laminated on the conductor layer, forming a subsequent resist layer having mask pattern such that the subsequent resist layer is formed on the insulating layer, and forming a subsequent conductor layer having conductor pattern using the subsequent resist layer. The forming of the resist layer includes conducting first correction in which formation position of entire mask pattern of the resist layer is corrected with respect to reference position, and conducting second correction in which shape of the mask pattern of the resist layer is corrected with respect to reference shape, and the forming of the subsequent resist layer does not include conducting the second correction.

Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on a surface of the insulating layer such that the conductor layer includes a conductor pad, and a solder resist layer formed on the surface of the insulating layer such that the solder resist layer is covering the conductor layer and having an opening exposing the conductor pad. The conductor pad of the conductor layer has a substantially rectangular planar shape such that the conductor pads has a main surface, a pair of long sides, a pair of short sides and four corner portions, and the solder resist layer is formed such that the opening is exposing side surfaces at the long sides and 50% or more of the main surface and that the solder resist layer is covering side surfaces at the short sides.

Abstract: A printed wiring board includes resin insulating layers, and conductor layers including a conductor layer such that the conductor layer includes a conductor circuit and that the conductor circuit has a surface index X/Y in a range of 1.00 to 2.20 where X is a length of an outer circumference of cross section of the conductor circuit, and Y is a length of an outer circumference of a reference quadrangle in the cross section of the conductor circuit. The reference quadrangle has a first reference line drawn with reference to bottom of deepest recess on first side, a second reference line is drawn with reference to bottom of deepest recess on second side, a third reference line is drawn with reference to bottom of deepest recess on third side, and a fourth reference line is drawn with reference to bottom of deepest recess on fourth side of the outer circumference.

Abstract: A printed wiring board includes resin insulating layers, and conductor layers laminated on the resin insulating layers, respectively. The conductor layers includes a conductor layer including a conductor circuit formed such that the conductor circuit has recesses each having a depth of 2.0 ?m or more and a bottom whose diameter is larger than a diameter of an opening part of a respective one of the recesses.

Abstract: A method for manufacturing a multilayer wiring substrate includes forming a resist layer having mask pattern, forming a conductor layer having conductor pattern using the resist layer, removing the resist layer, forming an insulating layer on the conductor layer such that the insulating layer is laminated on the conductor layer, forming a subsequent resist layer having mask pattern such that the subsequent resist layer is formed on the insulating layer, and forming a subsequent conductor layer having conductor pattern using the subsequent resist layer. The forming of the resist layer includes conducting first correction in which formation position of entire mask pattern of the resist layer is corrected with respect to reference position, and conducting second correction in which shape of the mask pattern of the resist layer is corrected with respect to reference shape, and the forming of the subsequent resist layer does not include conducting the second correction.