Patents by Inventor Shigeto Masuda

Shigeto Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8483640
    Abstract: A television broadcast receiving apparatus can change an oscillation frequency of a local oscillation signal or a tuning frequency of an intermediate frequency signal in a reception channel, and changes the reception characteristic to an optimum reception characteristic. In this way, the television broadcast receiving apparatus effectively reduces SN ratio deterioration due to interference of the outside of a reception band such as adjacent channel interference.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: July 9, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Shigeto Masuda
  • Publication number: 20110122258
    Abstract: A television broadcast receiving apparatus can change an oscillation frequency of a local oscillation signal or a tuning frequency of an intermediate frequency signal in a reception channel, and changes the reception characteristic to an optimum reception characteristic. In this way, the television broadcast receiving apparatus effectively reduces SN ratio deterioration due to interference of the outside of a reception band such as adjacent channel interference.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 26, 2011
    Inventor: Shigeto MASUDA
  • Publication number: 20090021650
    Abstract: A tuner section 1 includes: an RF signal input terminal 2 via which multichannel RF signals are supplied; an AGC circuit 4, by which the RF signal input terminal 2 is followed, for fixing or controlling a gain in accordance with a first gain control signal; a broadband amplifying circuit 5, by which the AGC circuit 4 is followed; an AGC circuit 6, by which the broadband amplifying circuit 5 is followed, for fixing or controlling a gain in accordance with a second gain control signal,; a mixer circuit 7 for selecting and picking out a target channel signal from signals supplied from the AGC circuit 6; and an AGC switching circuit 15 for controlling gains of the AGC circuit 4 and the AGC circuit 6 by selecting whether to fix or to control a gain of the AGC circuit 4 while selecting whether to fix or to control a gain of the AGC circuit 6.
    Type: Application
    Filed: July 17, 2008
    Publication date: January 22, 2009
    Inventor: Shigeto Masuda
  • Patent number: 7050119
    Abstract: Circuits and buses directed to analog signal processing are accommodated in a cabinet functioning as an electromagnetic shielding. Circuits and buses directed to digital signal processing are disposed outside the cabinet. In order to minimize generation of noise from the bus through which digital data is transmitted, a microprocessor combines a plurality of signals and data as digital data for output onto a bus from one I/O port. A decoder that receives and separates the combined data is provided in the cabinet. Data is transferred between the microprocessor and the decoder through one bus. As a result, a digital/analog common tuner has the influence of noise generated from a digital signal processing system on the analog signal processing system suppressed, improving the reception properties.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: May 23, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Shigeto Masuda
  • Publication number: 20030128303
    Abstract: Circuits and buses directed to analog signal processing are accommodated in a cabinet functioning as an electromagnetic shielding. Circuits and buses directed to digital signal processing are disposed outside the cabinet. In order to minimize generation of noise from the bus through which digital data is transmitted, a microprocessor combines a plurality of signals and data as digital data for output onto a bus from one I/O port. A decoder that receives and separates the combined data is provided in the cabinet. Data is transferred between the microprocessor and the decoder through one bus. As a result, a digital/analog common tuner has the influence of noise generated from a digital signal processing system on the analog signal processing system suppressed, improving the reception properties.
    Type: Application
    Filed: January 3, 2003
    Publication date: July 10, 2003
    Inventor: Shigeto Masuda
  • Publication number: 20020059432
    Abstract: An integrated service network system is provided which allows a user to select a network that guarantees no bandwidth and/or a network that guarantees the bandwidth.
    Type: Application
    Filed: October 23, 2001
    Publication date: May 16, 2002
    Inventors: Shigeto Masuda, Takashi Hibi
  • Patent number: 6343209
    Abstract: A tuner for both digital and analog use that can receive both digital broadcast and analog broadcast signals, includes a signal input terminal; a frequency conversion section which converts and inputted signal to an IF signal; and a switching/distributing section which, based on the type of received signal (analog/digital), switches a destination to which to send the IF signal or distributes the IF signal. There is also a down-converter section, that further converts the IF signal into a Low IF signal; a terminal for output of the IF signal. The aforementioned components are all contained in a single body that performs an electromagnetic seal function. Operation of the switching/distributing section and/or the down-converter section may be controlled by a control signal from a structural element within the body.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: January 29, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tatsuo Maeda, Shigeto Masuda
  • Patent number: 6028647
    Abstract: An input high frequency signal passes through a PIN diode having a variable high frequency resistance and is output from an AGC circuit. The PIN diode is connected so as to be biased forward between an AGC signal level and a fixed voltage level (such as ground potential). A bias resistor and a coil are connected in series between a node on the output side of the PIN diode and a node supplied with the ground potential. More specifically, the resistor and the coil are inserted in parallel between the transmission path for high frequency signals and the ground potential.
    Type: Grant
    Filed: July 1, 1997
    Date of Patent: February 22, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichirou Fukai, Shigeto Masuda