Patents by Inventor Shigeto Yoshida
Shigeto Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20090324702Abstract: The present invention provides a novel transfer vector and a recombinant baculovirus; methods for the production thereof; pharmaceuticals containing the recombinant baculovirus as an active ingredient, which are useful as preventive or therapeutic drugs for infectious diseases such as malaria and influenza; and methods for preventing and treating infectious diseases such as malaria and influenza. More specifically, the invention provides a recombinant transfer vector capable of expressing a foreign gene fused to a virus gene under the control of a dual promoter; a recombinant baculovirus; methods for the production thereof; pharmaceuticals containing the recombinant baculovirus as an active ingredient; and methods for preventing and treating infectious diseases such as malaria and influenza comprising administrating the recombinant baculovirus to patients.Type: ApplicationFiled: August 15, 2008Publication date: December 31, 2009Inventors: Shigeto Yoshida, Masanori Kawasaki, Makoto Matsumoto, Yoshio Ohba, Masahiro Saito, Yoshihiro Goto, Katsuya Inagaki, Masami Mizukoshi, Norimitsu Hariguchi, Kuniko Hirota
-
Publication number: 20090152095Abstract: The easy-to-tear stretched aliphatic polyester film of the present invention is characterized in that the edge tear strength in the longitudinal direction and the transverse direction is not more than 22 N. The easy-to-tear stretched aliphatic polyester film of the present invention is produced by a method of irradiation of actinic rays on an aliphatic polyester film or a method of film-forming a film obtained by laminating aliphatic polyesters having different melting points in three layers of A/B/A under particular film-forming conditions.Type: ApplicationFiled: January 26, 2009Publication date: June 18, 2009Applicant: Toyo Boseki Kabushiki KaishaInventors: Keizou Kawahara, Shigeto Yoshida, Masayuki Tsutsumi, Daisuke Sakura, Akinobu Nagara, Yoshiko Akitomo, Noriko Takahashi, Naonobu Oda, Kazumoto Imai, Kunio Takeuchi, Hiroshi Nagano, Hisato Kobayashi, Keiji Mori, Yasuhisa Fujita
-
Patent number: 7544414Abstract: An oriented syndiotactic polystyrene-based film composed of an oriented film made of a syndiotactic styrene polymer and an adhesiveness-improving layer formed from a specific water-dispersible resin on at least one surface of the oriented film, which is excellent in the tight adhesion between the oriented film and the adhesiveness-improving layer, the adhesion between the adhesiveness-improving layer and an ink layer or laminate layer applied thereon, economical efficiency, recyclability, and environmental compatibility in production. It is particularly preferable that the film be produced by applying the aqueous dispersion of the water-dispersible resin on unstretched or uniaxially stretched film to form the adhesiveness-improving layer, stretching the obtained laminate uni- or bi-axially at least one time, and then heat-treating the resulting laminate.Type: GrantFiled: May 16, 2003Date of Patent: June 9, 2009Assignee: Toyo Boseki Kabushiki KaishaInventors: Masayuki Tsutsumi, Hisato Kobayashi, Keizo Kawahara, Shigeto Yoshida, Shinsuke Yamaguchi, Kazutake Okamoto, Akira Takahashi, Eiji Kumagai, Akinobu Nagara, Yoshiko Akitomo, Kazumoto Imai, Naonobu Oda
-
Erasing device for liquid crystal display image and liquid crystal display device including the same
Patent number: 7499009Abstract: An erasing device for a liquid crystal display image of the present invention is furnished with an auxiliary power source for continuously supplying power source to a liquid crystal display panel for a certain period after the main power source of the main body of the liquid crystal display device is turned OFF. Upon input of a power source OFF signal directing to turn OFF the main power source, a driving signal generating circuit and a driver controller light up the liquid crystal display panel entirely on a saturation voltage of the liquid crystal and subsequently shut off the same entirely using the power supply from the auxiliary power source.Type: GrantFiled: June 9, 2005Date of Patent: March 3, 2009Assignee: Sharp Kabushiki KaishaInventors: Makoto Kanbe, Yasuhisa Itoh, Shigeto Yoshida, Hiroshi Yoneda -
Patent number: 7375708Abstract: A data signal line drive circuit supplying a video signal to a pixel array performs pseudo tone gradation processing with respect to the video signal that is sent to an n number of data signal lines SL by m (<n) stages of a pseudo tone gradation processing section, and outputs the video signal processed by the pseudo tone gradation processing section identical to the data signal lines SL per m lines when sends the video signals subjected to the pseudo tone gradation processing to the data signal lines SL. By doing this, the drive circuit using the pseudo tone gradation processing is given a simple circuit structure, thereby providing an image display apparatus of a driving circuit integrated type in which the pixel array and the drive circuit are formed on a substrate.Type: GrantFiled: March 25, 2002Date of Patent: May 20, 2008Assignee: Sharp Kabushiki KaishaInventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Yasuhiro Yoshida, Hiroyuki Furukawa
-
Patent number: 7369113Abstract: A driving device of a display device includes: a data signal line driving circuit including a shift register which has (i) multiple stages of flip-flops each of which operates in synchronism with a source clock signal and (ii) a level shifter for boosting the source clock signal whose amplitude is smaller than a driving voltage of each of the flip-flops so as to apply the driving voltage to the flip-flop, said data signal line driving circuit causing a sampling circuit to sample the image display data signal based on an output from the shift register so as to output the image display data signal to the data signal line; and control means for causing a frequency of the source clock signal in case of displaying an image to be higher than a frequency of the source clock signal in case of normal display in which multi-gradation display is performed in a full-color mode.Type: GrantFiled: March 16, 2005Date of Patent: May 6, 2008Assignee: Sharp Kabushiki KaishaInventors: Hajime Washio, Shinya Takahashi, Yuhiehiroh Murakami, Seijirou Gyouten, Shigeto Yoshida
-
Patent number: 7193604Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.Type: GrantFiled: February 18, 2005Date of Patent: March 20, 2007Assignee: Sharp Kabushiki KaishaInventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida
-
Patent number: 7173598Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.Type: GrantFiled: February 22, 2005Date of Patent: February 6, 2007Assignee: Sharp Kabushiki KaishaInventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Kazuhiro Maeda, Hiroshi Yoneda
-
Patent number: 7042431Abstract: In a vertical retrace interval, a pre-charge potential or a signal potential is applied to each polarity for AC driving liquid crystal at least once each, so as to maintain fluctuations in pixel potential between the positive polarity side and the negative polarity side uniform, and minimum required potentials are supplied to the data signal line, thereby suppressing decrease in image quality without significantly increasing power consumption.Type: GrantFiled: November 9, 2000Date of Patent: May 9, 2006Assignee: Sharp Kabushiki KaishaInventors: Hajime Washio, Nobuhiro Kuwabara, Shigeto Yoshida, Yuji Asoh, Hiroshi Yoneda
-
Publication number: 20060035096Abstract: An oriented syndiotactic polystyrene-based film composed of an oriented film made of a syndiotactic styrene polymer and an adhesiveness-improving layer formed from a specific water-dispersible resin on at least one surface of the oriented film, which is excellent in the tight adhesion between the oriented film and the adhesiveness-improving layer, the adhesion between the adhesiveness-improving layer and an ink layer or laminate layer applied thereon, economical efficiency, recyclability, and environmental compatibility in production. It is particularly preferable that the film be produced by applying the aqueous dispersion of the water-dispersible resin on unstretched or uniaxially stretched film to form the adhesiveness-improving layer, stretching the obtained laminate uni- or bi-axially at least one time, and then heat-treating the resulting laminate.Type: ApplicationFiled: May 16, 2003Publication date: February 16, 2006Inventors: Masayuki Tsutsumi, Hisato Kobayashi, Keizo Kawahara, Shigeto Yoshida, Shinsuke Yamaguchi, Kazutaka Okamoto, Akira Takahashi, Eiji Kumagai, Akinobu Nagara, Yoshiko Akitomo, Kazumoto Imai, Naonobu Oda
-
Erasing device for liquid crystal display image and liquid crystal display device including the same
Publication number: 20060007217Abstract: An erasing device for a liquid crystal display image of the present invention is furnished with an auxiliary power source for continuously supplying power source to a liquid crystal display panel for a certain period after the main power source of the main body of the liquid crystal display device is turned OFF. Upon input of a power source OFF signal directing to turn OFF the main power source, a driving signal generating circuit and a driver controller light up the liquid crystal display panel entirely on a saturation voltage of the liquid crystal and subsequently shut off the same entirely using the power supply from the auxiliary power source.Type: ApplicationFiled: June 9, 2005Publication date: January 12, 2006Applicant: Sharp Kabushiki KaishaInventors: Makoto Kanbe, Yasuhisa Itoh, Shigeto Yoshida, Hiroshi Yoneda -
Publication number: 20050206604Abstract: A driving device of a display device includes: a data signal line driving circuit including a shift register which has (i) multiple stages of flip-flops each of which operates in synchronism with a source clock signal and (ii) a level shifter for boosting the source clock signal whose amplitude is smaller than a driving voltage of each of the flip-flops so as to apply the driving voltage to the flip-flop, said data signal line driving circuit causing a sampling circuit to sample the image display data signal based on an output from the shift register so as to output the image display data signal to the data signal line; and control means for causing a frequency of the source clock signal in case of displaying an image to be higher than a frequency of the source clock signal in case of normal display in which multi-gradation display is performed in a full-color mode.Type: ApplicationFiled: March 16, 2005Publication date: September 22, 2005Inventors: Hajime Washio, Shinya Takahashi, Yuhiehiroh Murakami, Seijirou Gyouten, Shigeto Yoshida
-
Erasing device for liquid crystal display image and liquid crystal display device including the same
Patent number: 6940479Abstract: An erasing device for a liquid crystal display image of the present invention is furnished with an auxiliary power source for continuously supplying power source to a liquid crystal display panel for a certain period after the main power source of the main body of the liquid crystal display device is turned OFF. Upon input of a power source OFF signal directing to turn OFF the main power source, a driving signal generating circuit and a driver controller light up the liquid crystal display panel entirely on a saturation voltage of the liquid crystal and subsequently shut off the same entirely using the power supply from the auxiliary power source.Type: GrantFiled: March 6, 2002Date of Patent: September 6, 2005Assignee: Sharp Kabushiki KaishaInventors: Makoto Kanbe, Yasuhisa Itoh, Shigeto Yoshida, Hiroshi Yoneda -
Publication number: 20050168252Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.Type: ApplicationFiled: February 23, 2005Publication date: August 4, 2005Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Kazuhiro Maeda, Hiroshi Yoneda
-
Publication number: 20050140621Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.Type: ApplicationFiled: February 18, 2005Publication date: June 30, 2005Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida
-
Publication number: 20050103029Abstract: A detector (29) detects that a refrigerant gas has leaked from a refrigeration cycle, or detects in advance that a refrigerant is to leak. The alarming device (27) gives users an alarming signal warning against the refrigerant leak. The alarming device (27) is caused to stop giving an alarming signal after users open doors of storage compartments including a refrigerator compartment (4), a vegetable storage compartment (5) and a freezer compartment (6). For example, after all the doors of the storage compartments are opened, giving the alarming signal is stopped. Otherwise, giving the alarming signal is stopped after the door of a storage compartment into which cold air flows by causing a damper (12) to open is opened.Type: ApplicationFiled: December 27, 2002Publication date: May 19, 2005Inventors: Keizou Kawahara, Shigeto Yoshida, Masayuki Tsutsumi, Daisuke Sakura, Akinobu Nagara, Yoshiko Akitomo, Noriko Takahashi, Naonobu Oda, Kazumoto Imai, Kunio Takeuchi, Hiroshi Nagano, Hisato Kobayashi, Keiji Mori, Yasuhisa Fujita
-
Publication number: 20050106345Abstract: The easy-to-tear stretched aliphatic polyester film of the present invention is characterized in that the edge tear strength in the longitudinal direction and the transverse direction is not more than 22 N. The easy-to-tear stretched aliphatic polyester film of the present invention is produced by a method of irradiation of actinic rays on an aliphatic polyester film or a method of film-forming a film obtained by laminating aliphatic polyesters having different melting points in three layers of A/B/A under particular film-forming conditions.Type: ApplicationFiled: January 6, 2003Publication date: May 19, 2005Inventors: Keizou Kawahara, Shigeto Yoshida, Masayuki Tsutsumi, Daisuke Sakura, Akinobu Nagara, Yoshiko Akitomo, Noriko Takahashi, Naonobu Oda, Kazumoto Imai, Kunio Takeuchi, Hiroshi Nagano, Hisato Kobayashi, Keiji Mori, Yasuhisa Fujita
-
Patent number: 6879313Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.Type: GrantFiled: March 10, 2000Date of Patent: April 12, 2005Assignee: Sharp Kabushiki KaishaInventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Kazuhiro Maeda, Hiroshi Yoneda
-
Patent number: 6873313Abstract: An image display device of this invention includes a pre-charging voltage stabilizing section having current controlling means and charge holding means which respectively include a resistor and a capacitor to stabilize a pre-charging voltage. The charge holding means holds a voltage to be supplied to data signal lines, and the current controlling means suppresses a current flow from a control signal generating circuit, thereby suppressing power fluctuation at the control signal generating circuit. This suppresses fluctuation in the pre-charging voltage and enables data signal lines to be charged to a predetermined voltage, thereby suppressing deterioration of image quality and an increase in power consumption of the image display device.Type: GrantFiled: March 30, 2001Date of Patent: March 29, 2005Assignee: Sharp Kabushiki KaishaInventors: Hajime Washio, Nobuhiro Kuwabara, Hiroshi Yoneda, Shigeto Yoshida
-
Publication number: 20020149606Abstract: A data signal line drive circuit supplying a video signal to a pixel array performs pseudo tone gradation processing with respect to the video signal that is sent to an n number of data signal lines SL by m (<n) stages of a pseudo tone gradation processing section, and outputs the video signal processed by the pseudo tone gradation processing section identical to the data signal lines SL per m lines when sends the video signals subjected to the pseudo tone gradation processing to the data signal lines SL. By doing this, the drive circuit using the pseudo tone gradation processing is given a simple circuit structure, thereby providing an image display apparatus of a driving circuit integrated type in which the pixel array and the drive circuit are formed on a substrate.Type: ApplicationFiled: March 25, 2002Publication date: October 17, 2002Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Yasuhiro Yoshida, Hiroyuki Furukawa