Patents by Inventor Shigeto Yoshida

Shigeto Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090324702
    Abstract: The present invention provides a novel transfer vector and a recombinant baculovirus; methods for the production thereof; pharmaceuticals containing the recombinant baculovirus as an active ingredient, which are useful as preventive or therapeutic drugs for infectious diseases such as malaria and influenza; and methods for preventing and treating infectious diseases such as malaria and influenza. More specifically, the invention provides a recombinant transfer vector capable of expressing a foreign gene fused to a virus gene under the control of a dual promoter; a recombinant baculovirus; methods for the production thereof; pharmaceuticals containing the recombinant baculovirus as an active ingredient; and methods for preventing and treating infectious diseases such as malaria and influenza comprising administrating the recombinant baculovirus to patients.
    Type: Application
    Filed: August 15, 2008
    Publication date: December 31, 2009
    Inventors: Shigeto Yoshida, Masanori Kawasaki, Makoto Matsumoto, Yoshio Ohba, Masahiro Saito, Yoshihiro Goto, Katsuya Inagaki, Masami Mizukoshi, Norimitsu Hariguchi, Kuniko Hirota
  • Publication number: 20090152095
    Abstract: The easy-to-tear stretched aliphatic polyester film of the present invention is characterized in that the edge tear strength in the longitudinal direction and the transverse direction is not more than 22 N. The easy-to-tear stretched aliphatic polyester film of the present invention is produced by a method of irradiation of actinic rays on an aliphatic polyester film or a method of film-forming a film obtained by laminating aliphatic polyesters having different melting points in three layers of A/B/A under particular film-forming conditions.
    Type: Application
    Filed: January 26, 2009
    Publication date: June 18, 2009
    Applicant: Toyo Boseki Kabushiki Kaisha
    Inventors: Keizou Kawahara, Shigeto Yoshida, Masayuki Tsutsumi, Daisuke Sakura, Akinobu Nagara, Yoshiko Akitomo, Noriko Takahashi, Naonobu Oda, Kazumoto Imai, Kunio Takeuchi, Hiroshi Nagano, Hisato Kobayashi, Keiji Mori, Yasuhisa Fujita
  • Patent number: 7544414
    Abstract: An oriented syndiotactic polystyrene-based film composed of an oriented film made of a syndiotactic styrene polymer and an adhesiveness-improving layer formed from a specific water-dispersible resin on at least one surface of the oriented film, which is excellent in the tight adhesion between the oriented film and the adhesiveness-improving layer, the adhesion between the adhesiveness-improving layer and an ink layer or laminate layer applied thereon, economical efficiency, recyclability, and environmental compatibility in production. It is particularly preferable that the film be produced by applying the aqueous dispersion of the water-dispersible resin on unstretched or uniaxially stretched film to form the adhesiveness-improving layer, stretching the obtained laminate uni- or bi-axially at least one time, and then heat-treating the resulting laminate.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: June 9, 2009
    Assignee: Toyo Boseki Kabushiki Kaisha
    Inventors: Masayuki Tsutsumi, Hisato Kobayashi, Keizo Kawahara, Shigeto Yoshida, Shinsuke Yamaguchi, Kazutake Okamoto, Akira Takahashi, Eiji Kumagai, Akinobu Nagara, Yoshiko Akitomo, Kazumoto Imai, Naonobu Oda
  • Patent number: 7499009
    Abstract: An erasing device for a liquid crystal display image of the present invention is furnished with an auxiliary power source for continuously supplying power source to a liquid crystal display panel for a certain period after the main power source of the main body of the liquid crystal display device is turned OFF. Upon input of a power source OFF signal directing to turn OFF the main power source, a driving signal generating circuit and a driver controller light up the liquid crystal display panel entirely on a saturation voltage of the liquid crystal and subsequently shut off the same entirely using the power supply from the auxiliary power source.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: March 3, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Makoto Kanbe, Yasuhisa Itoh, Shigeto Yoshida, Hiroshi Yoneda
  • Patent number: 7375708
    Abstract: A data signal line drive circuit supplying a video signal to a pixel array performs pseudo tone gradation processing with respect to the video signal that is sent to an n number of data signal lines SL by m (<n) stages of a pseudo tone gradation processing section, and outputs the video signal processed by the pseudo tone gradation processing section identical to the data signal lines SL per m lines when sends the video signals subjected to the pseudo tone gradation processing to the data signal lines SL. By doing this, the drive circuit using the pseudo tone gradation processing is given a simple circuit structure, thereby providing an image display apparatus of a driving circuit integrated type in which the pixel array and the drive circuit are formed on a substrate.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: May 20, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Yasuhiro Yoshida, Hiroyuki Furukawa
  • Patent number: 7369113
    Abstract: A driving device of a display device includes: a data signal line driving circuit including a shift register which has (i) multiple stages of flip-flops each of which operates in synchronism with a source clock signal and (ii) a level shifter for boosting the source clock signal whose amplitude is smaller than a driving voltage of each of the flip-flops so as to apply the driving voltage to the flip-flop, said data signal line driving circuit causing a sampling circuit to sample the image display data signal based on an output from the shift register so as to output the image display data signal to the data signal line; and control means for causing a frequency of the source clock signal in case of displaying an image to be higher than a frequency of the source clock signal in case of normal display in which multi-gradation display is performed in a full-color mode.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: May 6, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hajime Washio, Shinya Takahashi, Yuhiehiroh Murakami, Seijirou Gyouten, Shigeto Yoshida
  • Patent number: 7193604
    Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: March 20, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida
  • Patent number: 7173598
    Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: February 6, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Kazuhiro Maeda, Hiroshi Yoneda
  • Patent number: 7042431
    Abstract: In a vertical retrace interval, a pre-charge potential or a signal potential is applied to each polarity for AC driving liquid crystal at least once each, so as to maintain fluctuations in pixel potential between the positive polarity side and the negative polarity side uniform, and minimum required potentials are supplied to the data signal line, thereby suppressing decrease in image quality without significantly increasing power consumption.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: May 9, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hajime Washio, Nobuhiro Kuwabara, Shigeto Yoshida, Yuji Asoh, Hiroshi Yoneda
  • Publication number: 20060035096
    Abstract: An oriented syndiotactic polystyrene-based film composed of an oriented film made of a syndiotactic styrene polymer and an adhesiveness-improving layer formed from a specific water-dispersible resin on at least one surface of the oriented film, which is excellent in the tight adhesion between the oriented film and the adhesiveness-improving layer, the adhesion between the adhesiveness-improving layer and an ink layer or laminate layer applied thereon, economical efficiency, recyclability, and environmental compatibility in production. It is particularly preferable that the film be produced by applying the aqueous dispersion of the water-dispersible resin on unstretched or uniaxially stretched film to form the adhesiveness-improving layer, stretching the obtained laminate uni- or bi-axially at least one time, and then heat-treating the resulting laminate.
    Type: Application
    Filed: May 16, 2003
    Publication date: February 16, 2006
    Inventors: Masayuki Tsutsumi, Hisato Kobayashi, Keizo Kawahara, Shigeto Yoshida, Shinsuke Yamaguchi, Kazutaka Okamoto, Akira Takahashi, Eiji Kumagai, Akinobu Nagara, Yoshiko Akitomo, Kazumoto Imai, Naonobu Oda
  • Publication number: 20060007217
    Abstract: An erasing device for a liquid crystal display image of the present invention is furnished with an auxiliary power source for continuously supplying power source to a liquid crystal display panel for a certain period after the main power source of the main body of the liquid crystal display device is turned OFF. Upon input of a power source OFF signal directing to turn OFF the main power source, a driving signal generating circuit and a driver controller light up the liquid crystal display panel entirely on a saturation voltage of the liquid crystal and subsequently shut off the same entirely using the power supply from the auxiliary power source.
    Type: Application
    Filed: June 9, 2005
    Publication date: January 12, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Makoto Kanbe, Yasuhisa Itoh, Shigeto Yoshida, Hiroshi Yoneda
  • Publication number: 20050206604
    Abstract: A driving device of a display device includes: a data signal line driving circuit including a shift register which has (i) multiple stages of flip-flops each of which operates in synchronism with a source clock signal and (ii) a level shifter for boosting the source clock signal whose amplitude is smaller than a driving voltage of each of the flip-flops so as to apply the driving voltage to the flip-flop, said data signal line driving circuit causing a sampling circuit to sample the image display data signal based on an output from the shift register so as to output the image display data signal to the data signal line; and control means for causing a frequency of the source clock signal in case of displaying an image to be higher than a frequency of the source clock signal in case of normal display in which multi-gradation display is performed in a full-color mode.
    Type: Application
    Filed: March 16, 2005
    Publication date: September 22, 2005
    Inventors: Hajime Washio, Shinya Takahashi, Yuhiehiroh Murakami, Seijirou Gyouten, Shigeto Yoshida
  • Patent number: 6940479
    Abstract: An erasing device for a liquid crystal display image of the present invention is furnished with an auxiliary power source for continuously supplying power source to a liquid crystal display panel for a certain period after the main power source of the main body of the liquid crystal display device is turned OFF. Upon input of a power source OFF signal directing to turn OFF the main power source, a driving signal generating circuit and a driver controller light up the liquid crystal display panel entirely on a saturation voltage of the liquid crystal and subsequently shut off the same entirely using the power supply from the auxiliary power source.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: September 6, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Makoto Kanbe, Yasuhisa Itoh, Shigeto Yoshida, Hiroshi Yoneda
  • Publication number: 20050168252
    Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 4, 2005
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Kazuhiro Maeda, Hiroshi Yoneda
  • Publication number: 20050140621
    Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
    Type: Application
    Filed: February 18, 2005
    Publication date: June 30, 2005
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida
  • Publication number: 20050103029
    Abstract: A detector (29) detects that a refrigerant gas has leaked from a refrigeration cycle, or detects in advance that a refrigerant is to leak. The alarming device (27) gives users an alarming signal warning against the refrigerant leak. The alarming device (27) is caused to stop giving an alarming signal after users open doors of storage compartments including a refrigerator compartment (4), a vegetable storage compartment (5) and a freezer compartment (6). For example, after all the doors of the storage compartments are opened, giving the alarming signal is stopped. Otherwise, giving the alarming signal is stopped after the door of a storage compartment into which cold air flows by causing a damper (12) to open is opened.
    Type: Application
    Filed: December 27, 2002
    Publication date: May 19, 2005
    Inventors: Keizou Kawahara, Shigeto Yoshida, Masayuki Tsutsumi, Daisuke Sakura, Akinobu Nagara, Yoshiko Akitomo, Noriko Takahashi, Naonobu Oda, Kazumoto Imai, Kunio Takeuchi, Hiroshi Nagano, Hisato Kobayashi, Keiji Mori, Yasuhisa Fujita
  • Publication number: 20050106345
    Abstract: The easy-to-tear stretched aliphatic polyester film of the present invention is characterized in that the edge tear strength in the longitudinal direction and the transverse direction is not more than 22 N. The easy-to-tear stretched aliphatic polyester film of the present invention is produced by a method of irradiation of actinic rays on an aliphatic polyester film or a method of film-forming a film obtained by laminating aliphatic polyesters having different melting points in three layers of A/B/A under particular film-forming conditions.
    Type: Application
    Filed: January 6, 2003
    Publication date: May 19, 2005
    Inventors: Keizou Kawahara, Shigeto Yoshida, Masayuki Tsutsumi, Daisuke Sakura, Akinobu Nagara, Yoshiko Akitomo, Noriko Takahashi, Naonobu Oda, Kazumoto Imai, Kunio Takeuchi, Hiroshi Nagano, Hisato Kobayashi, Keiji Mori, Yasuhisa Fujita
  • Patent number: 6879313
    Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 12, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Kazuhiro Maeda, Hiroshi Yoneda
  • Patent number: 6873313
    Abstract: An image display device of this invention includes a pre-charging voltage stabilizing section having current controlling means and charge holding means which respectively include a resistor and a capacitor to stabilize a pre-charging voltage. The charge holding means holds a voltage to be supplied to data signal lines, and the current controlling means suppresses a current flow from a control signal generating circuit, thereby suppressing power fluctuation at the control signal generating circuit. This suppresses fluctuation in the pre-charging voltage and enables data signal lines to be charged to a predetermined voltage, thereby suppressing deterioration of image quality and an increase in power consumption of the image display device.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: March 29, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hajime Washio, Nobuhiro Kuwabara, Hiroshi Yoneda, Shigeto Yoshida
  • Publication number: 20020149606
    Abstract: A data signal line drive circuit supplying a video signal to a pixel array performs pseudo tone gradation processing with respect to the video signal that is sent to an n number of data signal lines SL by m (<n) stages of a pseudo tone gradation processing section, and outputs the video signal processed by the pseudo tone gradation processing section identical to the data signal lines SL per m lines when sends the video signals subjected to the pseudo tone gradation processing to the data signal lines SL. By doing this, the drive circuit using the pseudo tone gradation processing is given a simple circuit structure, thereby providing an image display apparatus of a driving circuit integrated type in which the pixel array and the drive circuit are formed on a substrate.
    Type: Application
    Filed: March 25, 2002
    Publication date: October 17, 2002
    Inventors: Yasushi Kubota, Hajime Washio, Shigeto Yoshida, Yasuhiro Yoshida, Hiroyuki Furukawa