Abstract: A time division multiplex transmission system transmits information on multiple channels by using a transmission path with variable time division multiplexing. The variable time division multiplex transmission system of this invention is equipped with multiple channel devices 30 and a single transmission path 5 connected to these multiple channel devices. The multiple channel devices 30 transmit or receive data over the transmission path. Additionally, the system is equipped with a circuit that determines consecutive time slots for using the transmission path, and each of the channel devices transmits or receives data using consecutive time slots. Data can be transmitted in two or more different transmission bands, and the different transmission bands are realized by making the number of time slots used for a communication frame different.

Abstract: A time division multiplex transmission system transmits information on multiple channels by using a transmission path with variable time division multiplexing. The variable time division multiplex transmission system of this invention is equipped with multiple channel devices 30 and a single transmission path 5 connected to these multiple channel devices. The multiple channel devices 30 transmit or receive data over the transmission path. Additionally, the system is equipped with a circuit that determines consecutive time slots for using the transmission path, and each of the channel devices transmits or receives data using consecutive time slots. Data can be transmitted in two or more different transmission bands, and the different transmission bands are realized by making the number of time slots used for a communication frame different.

Abstract: A communication system carries out communication between a master device and one or more groups of multiple slave devices. In addition to bus 5 that connects master device 1 and multiple slave devices 30, the communication system also has multiple daisy chain connection lines 7-1˜N that connect multiple devices 30 in a daisy chain DC. By using the daisy chain, a device identifier can be automatically assigned to each slave device in the slave device group, or a sequential number in a sequence for allocating a sharable resource is assigned to each slave device.

Abstract: A time division multiplex transmission system transmits information on multiple channels by using a transmission path with variable time division multiplexing. The variable time division multiplex transmission system of this invention is equipped with multiple channel devices 30 and a single transmission path 5 connected to these multiple channel devices. The multiple channel devices 30 transmit or receive data over the transmission path. Additionally, the system is equipped with a circuit that determines consecutive time slots for using the transmission path, and each of the channel devices transmits or receives data using consecutive time slots. Data can be transmitted in two or more different transmission bands, and the different transmission bands are realized by making the number of time slots used for a communication frame different.

Abstract: A digital-to-analog (D/A) converter with a required accuracy can be implemented in a smaller chip area and at a lower cost. The D/A converter comprises a decoder which receives a digital input signal comprised of a first number of bits, and divides the first number of bits into a second number of bit groups. Bit group converters equal in number to the second number, are provided for the second number of bit groups, and each selects and uses a form of weight for each of the bit groups associated therewith to convert the bit group into an analog form in response to the second number of bit groups, thereby generating the second number of bit group analog outputs. An adder adds the second number of the bit group analog outputs to form an analog signal output representative of the digital signal input.

Abstract: A method and apparatus for improving an S/N ratio in a digital-to-analog conversion of a PDM signal are provided. A digital-to-analog conversion system comprises an S/N ratio improving section. The S/N ratio improving section has a signal component extractor which extracts a signal component included in the PDM signal, and outputs a digitally filtered output signal. The digitally filtered output signal has a second full scale smaller than a first full scale of the PDM signal. The S/N ratio improving section also comprises a full-scale matching unit which matches the second full scale of the digitally filtered output signal with a third full scale of digital-to-analog conversion.

Abstract: A digital-to-analog converter is provided for accomplishing analog output characteristics using different digital-to-analog conversion type digital signal processing schemes. A plurality of bits of a received digital signal are divided into a plurality of bit groups. A digital signal processing unit includes a plurality of bit group digital signal processors for receiving the plurality of bit groups. The plurality of digital signal processors employ one or more digital-to-analog conversion type digital signal processing schemes for generating a plurality of digital signal processed outputs. The converter adds the plurality of digital signal processed outputs to generate a composite signal processed output, and includes a weight generating unit for controlling a plurality of shared weight generating elements in response to the composite digital signal processed output to generate an analog output signal.

Abstract: A method and apparatus for improving an S/N ratio in a digital-to-analog conversion of a PDM signal are provided. A digital-to-analog conversion system comprises an S/N ratio improving section. The S/N ratio improving section has a signal component extractor which extracts a signal component included in the PDM signal, and outputs a digitally filtered output signal. The digitally filtered output signal has a second full scale smaller than a first full scale of the PDM signal.

Abstract: A digital-to-analog converter is provided for converting a digital input signal modulated in a frequency domain such as a delta-sigma modulated digital signal recorded in conformity with the DSD scheme to an analog output signal. The converter comprises a digital filter for filtering a digital input signal to generate a digitally filtered output signal comprised of a second number (N) of bits, and a digital-to-analog converting unit for converting the digitally filtered output signal to an analog form to generate an analog output signal.

Abstract: A digital-to-analog converter is provided for accomplishing analog output characteristics using different digital-to-analog conversion type digital signal processing schemes. A plurality of bits of a received digital signal are divided into a plurality of bit groups. A digital signal processing unit includes a plurality of bit group digital signal processors for receiving the plurality of bit groups. The plurality of digital signal processors employ one or more digital-to-analog conversion type digital signal processing schemes for generating a plurality of digital signal processed outputs. The converter adds the plurality of digital signal processed outputs to generate a composite signal processed output, and includes a weight generating unit for controlling a plurality of shared weight generating elements in response to the composite digital signal processed output to generate an analog output signal.

Abstract: A characteristic tone in a delta-sigma analog-to-digital converter is shifted out of an audible pass band without diminishing dynamic range or signal-to-noise ratio thereof by operating the digital-to-analog converter to measure its offset voltage. If the amplitude of the measured offset voltage exceeds a predetermined value, no dither signal is applied to the input of the delta-sigma modulator. If the measured offset voltage is less than the predetermined value, a positive DC dither voltage is added to the input voltage of the delta-sigma modulator if the measured offset voltage is positive, or is subtracted if the measured offset voltage is negative.