Abstract: A wiring substrate is provided with a first wiring layer including a first land, a first insulative layer formed on the first wiring layer, a second wiring layer formed on the first insulative layer, a second insulative layer formed on the second wiring layer, and a via formed extending through the first insulative layer and the second insulative layer in a thicknesswise direction. The via includes one end, which is electrically connected to the first land of the first wiring layer, and another end, which is located opposed to the one end and serves as a pad to which a mounted electronic component is electrically connected. The second wiring layer includes a coupling portion electrically connected to the via. The coupling portion of the second wiring has a width that is smaller than a diameter of the via.

Abstract: There is provided a wiring substrate. The wiring substrate includes: a heat sink; an insulating layer on the heat sink; first and second wiring patterns on the insulating layer to be separated from each other at a certain interval; a first reflective layer including a first opening on the insulating layer so as to cover the first and second wiring patterns, wherein a portion of the first and second wiring patterns is exposed from the first opening, and wherein the portion of the first and second wiring patterns is defined as a mounting region on which a light emitting element is to be mounted; and a second reflective layer on the insulating layer, wherein the second reflective layer is interposed between the first and second wiring patterns. A thickness of the second reflective layer is smaller than that of the first reflective layer.

Abstract: There is provided a wiring substrate. The wiring substrate includes: a heat sink; an insulating member on the heat sink; a wiring pattern embedded in the insulating member and including a first surface and a second surface opposite to the first surface, the second surface contacting the insulating member; and a metal layer on the first surface of the wiring pattern, wherein an exposed surface of the metal layer is flush with an exposed surface of the insulating member.

Abstract: There is provided a wiring substrate. The wiring substrate includes: a heat sink; a first insulating layer on the heat sink; a wiring pattern on the first insulating layer, wherein the wiring pattern is configured to mount a light emitting element thereon; and a second insulating layer on the first insulating layer such that the wiring pattern is exposed from the second insulating layer.

Abstract: A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.

Abstract: A wiring substrate includes a wiring pattern, which includes an upper surface forming a desired recognition mark, and a solder resist layer, which covers the wiring pattern. The solder resist layer includes a recess that entirely exposes the upper surface of the wiring pattern. The solder resist layer includes a solder resist layer formed at a region corresponding to the recess and a solder resist layer formed outside the recess. The recess entirely exposes the upper surface of the wiring pattern as the recognition mark, and the solder resist layer is formed at portions outside the upper surface of the wiring pattern.

Abstract: A wiring substrate includes a wiring pattern in an uppermost layer that includes pads. A solder resist layer covers the wiring pattern. A recess exposes part of the wiring pattern from the solder resist layer to form pads. The solder resist layer includes a portion formed in a region corresponding to the recess, a portion formed outward from the recess, and a portion formed inward from the recess. The upper surface of the solder resist layer at the portion corresponding to the recess is higher than the upper surface of the pads but lower than the upper surfaces of the other portions of the solder resist layer.

Abstract: A wiring board includes: an uppermost wiring layer formed on a prescribed number of underlying wiring layers, a portion of the uppermost wiring layer being exposed and used as a pad for connection with a component to be mounted; and an insulation resin layer covering the uppermost wiring layer, wherein the thickness of the portion of the uppermost wiring layer is larger than that of other portions thereof.

Abstract: A wiring substrate is provided with a first wiring layer including a first land, a first insulative layer formed on the first wiring layer, a second wiring layer formed on the first insulative layer, a second insulative layer formed on the second wiring layer, and a via formed extending through the first insulative layer and the second insulative layer in a thicknesswise direction. The via includes one end, which is electrically connected to the first land of the first wiring layer, and another end, which is located opposed to the one end and serves as a pad to which a mounted electronic component is electrically connected. The second wiring layer includes a coupling portion electrically connected to the via. The coupling portion of the second wiring has a width that is smaller than a diameter of the via.

Abstract: A wiring substrate includes a wiring pattern, which includes an upper surface forming a desired recognition mark, and a solder resist layer, which covers the wiring pattern. The solder resist layer includes a recess that entirely exposes the upper surface of the wiring pattern. The solder resist layer includes a solder resist layer formed at a region corresponding to the recess and a solder resist layer formed outside the recess. The recess entirely exposes the upper surface of the wiring pattern as the recognition mark, and the solder resist layer is formed at portions outside the upper surface of the wiring pattern.

Abstract: In a semiconductor apparatus, a semiconductor element is mounted on a wiring substrate. Wiring patterns and protrusions are formed on a surface of a substrate with the wiring patterns extending on tops of the protrusions. The surface of the substrate on which the wiring patterns are formed are covered with an insulating layer. Surfaces of connection parts of the wiring patterns formed on the tops of the protrusions are formed with the surfaces of the connection parts exposed to a surface of the insulating layer on a level with the surface of the insulating layer or in a position lower than the surface of the insulating layer. The connection parts are formed as pads for connection formed in alignment with connection electrodes of the semiconductor element. The semiconductor element is mounted by making electrical connection to the connection parts by flip chip bonding.

Abstract: A wiring substrate includes a wiring pattern in an uppermost layer that includes pads. A solder resist layer covers the wiring pattern. A recess exposes part of the wiring pattern from the solder resist layer to form pads. The solder resist layer includes a portion formed in a region corresponding to the recess, a portion formed outward from the recess, and a portion formed inward from the recess. The upper surface of the solder resist layer at the portion corresponding to the recess is higher than the upper surface of the pads but lower than the upper surfaces of the other portions of the solder resist layer.

Abstract: A wiring board includes: an uppermost wiring layer formed on a prescribed number of underlying wiring layers, a portion of the uppermost wiring layer being exposed and used as a pad for connection with a component to be mounted; and an insulation resin layer covering the uppermost wiring layer, wherein the thickness of the portion of the uppermost wiring layer is larger than that of other portions thereof.

Abstract: A wiring board includes: an uppermost wiring layer formed on a prescribed number of underlying wiring layers, a portion of the uppermost wiring layer being exposed and used as a pad for connection with a component to be mounted; and an insulation resin layer covering the uppermost wiring layer, wherein the thickness of the portion of the uppermost wiring layer is larger than that of other portions thereof.

Abstract: A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.

Abstract: A wiring substrate, includes a first wiring layer, an insulating layer formed on the first wiring layer, a via conductor filled to penetrate the insulating layer in a thickness direction and connected to a connection portion of the first wiring layer, and a second wiring layer which is formed on the insulating layer and whose connection portion is connected to the via conductor, wherein, out of the first wiring layer and the second wiring layer, the connection portion of one wiring layer is formed as a land whose diameter is larger than a diameter of the via conductor, and the connection portion of other wiring layer is formed as a landless wiring portion whose diameter is equal to or smaller than a diameter of the via conductor.

Abstract: There is provided a flip-chip substrate which is flip-chip connected to electrode terminals provided on one surface of an electronic component. The flip-chip substrate includes: mounting pads which are exposed to a surface of the flip-chip substrate on which the electronic component is mounted and each of which comprises a pad surface which is flip-chip connected to a corresponding one of the electrode terminals; wiring patterns which are electrically connected to the mounting pads; an insulating layer which covers the wiring patterns; and a solder resist formed on an entire surface of the insulating layer such that each pad surface of the mounting pads is exposed from the solder resist.

Abstract: A wiring board 100 has a multilayer structure in which insulating layers and wiring layers are arranged on upper and lower surfaces of a core substrate 240, and has a via structure 200 in which electrolytic Cu plating is carried out over a via forming opening provided by patterning a resist layer to form a via 220. A through hole 244 and a wiring pattern 210 to be connected to the through hole 244 are formed on the core substrate 240. The via 220 taking a cylindrical shape is mounted on an upper surface of the wiring pattern 210 and a wiring pattern 230 is formed on an upper surface of the via 220. The via structure 200 is constituted by the wiring pattern 210, the via 220 and the wiring pattern 230, and the through hole 244, the wiring pattern 210, the via 220 and the wiring pattern 230 are electrically connected respectively.

Abstract: A method of producing a multilayer interconnection board is disclosed that includes the steps of processing a resin member on an interconnection layer by imprinting press, and removing residue of the resin member at the bottom of a via hole after forming the via hole. In the method of producing a multilayer interconnection board, a thermal setting resin, which has a setting temperature higher than that of the resin member, is applied on a via-connecting portion of the interconnection layer, the resin member is formed on the interconnection layer, an interconnection groove and a via hole are formed by imprinting press on the resin member by using a tool, and an un-cured portion of the high temperature setting resin is dissolved and removed by using a resin solvent. Thereby, residue of the resin member on the thermal setting resin is removed.

Abstract: A wiring board includes: an uppermost wiring layer formed on a prescribed number of underlying wiring layers, a portion of the uppermost wiring layer being exposed and used as a pad for connection with a component to be mounted; and an insulation resin layer covering the uppermost wiring layer, wherein the thickness of the portion of the uppermost wiring layer is larger than that of other portions thereof.