Patents by Inventor Shigeya Takagi

Shigeya Takagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8127351
    Abstract: A program execution control apparatus and a program execution method are provided by which even when a program is rewritten into an illegal program after the first-mentioned program is checked, execution of the rewritten illegal program can be avoided, and also, which can readily confirm that which program has been rewritten in an illegal manner at which time instant. The program execution control apparatus of the present invention is equipped with: a flash memory 101 for storing thereinto a program; a condition detection unit 103 for detecting a check time instant for checking as to whether or not the program is illegal; an illegality check unit 104 for checking as to whether or not the illegal program is present at the check time instant; an execution control unit 105 for controlling as to whether or not the program is executed in response to the check result; and a CPU 102 for executing the program in response to a result of the execution control unit 105.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: February 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Shigeya Takagi, Hidetaka Matsumoto
  • Patent number: 7694182
    Abstract: In a multitask execution environment, a debugging device performs debugging setting for rewriting part of original recording content in a memory area shared by at least two tasks, and debugging cancellation for restoring rewritten recording content back to original recording content. The debugging device stores a memory area used by each task, and address information specifying each debugging target task and a respective address. When task switching occurs, if a next task is not a debugging target, recording content at a physical address specified by address information other than that of the next task and within the physical address space range used by the next task is put into a post-debugging cancellation state. If the next task is a debugging target task, in addition to the above processing, recording content at the physical address specified by the address information of the next task is put into a post-debugging setting state.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: April 6, 2010
    Assignee: Panasonic Corporation
    Inventors: Shigeya Takagi, Yasuhiko Hamada, Hidetaka Matsumoto
  • Publication number: 20070214366
    Abstract: A program execution control apparatus and a program execution method are provided by which even when a program is rewritten into an illegal program after the first-mentioned program is checked, execution of the rewritten illegal program can be avoided, and also, which can readily confirm that which program has been rewritten in an illegal manner at which time instant. The program execution control apparatus of the present invention is equipped with: a flash memory 101 for storing thereinto a program; a condition detection unit 103 for detecting a check time instant for checking as to whether or not the program is illegal; an illegality check unit 104 for checking as to whether or not the illegal program is present at the check time instant; an execution control unit 105 for controlling as to whether or not the program is executed in response to the check result; and a CPU 102 for executing the program in response to a result of the execution control unit 105.
    Type: Application
    Filed: May 13, 2005
    Publication date: September 13, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shigeya Takagi, Hidetaka Matsumoto
  • Publication number: 20070061627
    Abstract: In a multitask execution environment, a debugging device performs debugging setting for rewriting part of original recording content in a memory area shared by at least two tasks, and debugging cancellation for restoring rewritten recording content back to original recording content. The debugging device stores a memory area used by each task, and address information specifying each debugging target task and a respective address. When task switching occurs, if a next task is not a debugging target, recording content at a physical address specified by address information other than that of the next task and within the physical address space range used by the next task is put into a post-debugging cancellation state. If the next task is a debugging target task, in addition to the above processing, recording content at the physical address specified by the address information of the next task is put into a post-debugging setting state.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 15, 2007
    Inventors: Shigeya Takagi, Yasuhiko Hamada, Hidetaka Matsumoto
  • Publication number: 20030070117
    Abstract: A simulation apparatus and a simulation method that are inexpensive, can achieve a higher execution speed and can perform simulation without using a peripheral circuit simulator under the same condition as that in the case of incorporating a program in hardware are provided. The simulation apparatus includes a storing portion that stores a program to be debugged containing a control operation of hardware, a debug support function for supporting the control operation and a debug support function management information, a writing portion that writes an instruction for invoking the debug support function into the program to be debugged based on the debug support function management information, an instruction fetching portion that fetches the instruction from the program to be debugged and, if the fetched instruction is the instruction for invoking the debug support function, fetches an instruction from the debug support function, and an instruction executing portion that executes this fetched instruction.
    Type: Application
    Filed: September 19, 2002
    Publication date: April 10, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshio Matsuki, Shigeya Takagi, Hidetaka Matsumoto