Patents by Inventor Shigeya Tanaka
Shigeya Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11561184Abstract: The purpose of the present invention is to increase accuracy of a specific test using an electronic microscope and improve work efficiency. Provided is a system that identifies test recipe information corresponding to an object to be tested on the basis of attribute information about a testing sample, and analyzes and evaluates the object to be tested contained in the testing sample by checking image data and element analysis data that are acquired by a measuring device in accordance with a control program for the test recipe information, against reference image data and reference element analysis data that are used as evaluation references for the object to be tested.Type: GrantFiled: September 25, 2018Date of Patent: January 24, 2023Assignee: HITACHI HIGH-TECH CORPORATIONInventors: Nobuyoshi Tada, Shigeya Tanaka, Minori Noguchi, Yuusuke Oominami, Maya Goto
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Publication number: 20200278303Abstract: The purpose of the present invention is to increase accuracy of a specific test using an electronic microscope and improve work efficiency. Provided is a system that identifies test recipe information corresponding to an object to be tested on the basis of attribute information about a testing sample, and analyzes and evaluates the object to be tested contained in the testing sample by checking image data and element analysis data that are acquired by a measuring device in accordance with a control program for the test recipe information, against reference image data and reference element analysis data that are used as evaluation references for the object to be tested.Type: ApplicationFiled: September 25, 2018Publication date: September 3, 2020Inventors: Nobuyoshi TADA, Shigeya TANAKA, Minori NOGUCHI, Yuusuke OOMINAMI, Maya GOTO
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Publication number: 20170332965Abstract: A head mount apparatus mounted on a head of a user is disclosed, which includes: detection means to detect a variation of a bloodflow rate of the head; and transfer means to transfer a detection value of the detection means to a predetermined transfer destination. An information processing apparatus is also disclosed, which includes; receiving means to receive a detection value transferred from transfer means; and service providing means to provide a user with a service based on the received detection value.Type: ApplicationFiled: November 25, 2015Publication date: November 23, 2017Inventors: Kiyoshi HASEGAWA, Kiyoshi NASU, Shigeya TANAKA, Toshihiro ISHIZUKA
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Patent number: 9164042Abstract: The present invention provides a device for detecting foreign matter and a method for detecting foreign matter to detect a foreign matter on a surface of an object such as a film of an electrode mixture etc. or a foreign matter contained in the object, thereby to improve the reliability of the object. By irradiating an object with a terahertz illumination light 100 (wavelength of 4 ?m to 10 mm) and detecting a scattered light 660 from an electrode 10 as an example of the object by a scattered light detector 200, a foreign matter on a surface of the electrode 10 or contained in the electrode 10, for example, a metal foreign matter 720, is detected. The electrode 10 is one in which electrode mixture layers 700 each including an active material 701, conductive additive and a binder as components are coated on both surfaces of a collector 710. The scattered light 660 results from a part of a transmitted light 656 reflected by the metal foreign matter 720.Type: GrantFiled: February 1, 2012Date of Patent: October 20, 2015Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Kenji Aiko, Shigeya Tanaka, Yasuko Aoki, Hiroshi Kawaguchi, Kei Shimura
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Publication number: 20130320216Abstract: The present invention provides a device for detecting foreign matter and a method for detecting foreign matter to detect a foreign matter on a surface of an object such as a film of an electrode mixture etc. or a foreign matter contained in the object, thereby to improve the reliability of the object. By irradiating an object with a terahertz illumination light 100 (wavelength of 4 ?m to 10 mm) and detecting a scattered light 660 from an electrode 10 as an example of the object by a scattered light detector 200, a foreign matter on a surface of the electrode 10 or contained in the electrode 10, for example, a metal foreign matter 720, is detected. The electrode 10 is one in which electrode mixture layers 700 each including an active material 701, conductive additive and a binder as components are coated on both surfaces of a collector 710. The scattered light 660 results from a part of a transmitted light 656 reflected by the metal foreign matter 720.Type: ApplicationFiled: February 1, 2012Publication date: December 5, 2013Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Kenji Aiko, Shigeya Tanaka, Yasuko Aoki, Hiroshi Kawaguchi, Kei Shimura
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Patent number: 7999565Abstract: A visual inspection apparatus and method using the scanning electron microscope are disclosed. An electron beam is scanned repeatedly on a sample, and an inspection and a reference image are generated by the secondary electrons generated from the sample or reflected electrons. From the differential image between the inspection image and the reference image, a defect is determined. The number of pixels in the generated image along the direction of repetitive scanning by the electron beam can be changed.Type: GrantFiled: January 5, 2009Date of Patent: August 16, 2011Assignee: Hitachi High-Technologies CorporationInventors: Yasuhiro Gunji, Hiroshi Miyai, Shigeya Tanaka
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Patent number: 7889911Abstract: An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.Type: GrantFiled: July 10, 2008Date of Patent: February 15, 2011Assignee: Hitachi High-Technologies CorporationInventors: Michio Nakano, Shigeya Tanaka, Yoshiyuki Momiyama, Takashi Hiroi, Kazuya Hayashi, Dai Fujii, Takako Fujisawa, Atsushi Ichige, Ichiro Kawashima
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Publication number: 20090123059Abstract: A visual inspection apparatus and method using the scanning electron microscope are disclosed. An electron beam is scanned repeatedly on a sample, and an inspection and a reference image are generated by the secondary electrons generated from the sample or reflected electrons. From the differential image between the inspection image and the reference image, a defect is determined. The number of pixels in the generated image along the direction of repetitive scanning by the electron beam can be changed.Type: ApplicationFiled: January 5, 2009Publication date: May 14, 2009Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Yasuhiro GUNJI, Hiroshi Miyai, Shigeya Tanaka
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Patent number: 7521676Abstract: The present invention provides a mirror electron projection (MPJ) type (SEPJ type included) scanning electron beam apparatus that is capable of performing condition setup, and a method and apparatus for inspecting pattern defects with the scanning electron beam apparatus. A mirror electron projection type defect inspection apparatus, which comprises a charging device for emitting a charging electron beam, electron beam irradiation means for shedding a mirror electron projection electron beam onto an inspection region near which an electrical potential distribution is formed, detection means for detecting secondary electrons or reflected electrons generated from a surface and proximity of the specimen, and defect detection means for detecting a defect by processing a mirror image signal that is detected by the detection means, includes irradiation condition optimization means for optimizing charging electron beam irradiation conditions.Type: GrantFiled: November 20, 2006Date of Patent: April 21, 2009Assignee: Hitachi High-Technologies CorporationInventors: Hirohito Okuda, Takashi Hiroi, Masaki Hasegawa, Shigeya Tanaka
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Patent number: 7518383Abstract: A visual inspection apparatus and method using the scanning electron microscope are disclosed. An electron beam is scanned repeatedly on a sample, and an inspection and a reference image are generated by the secondary electrons generated from the sample or reflected electrons. From the differential image between the inspection image and the reference image, a defect is determined. The number of pixels in the generated image along the direction of repetitive scanning by the electron beam can be changed.Type: GrantFiled: April 20, 2006Date of Patent: April 14, 2009Assignee: Hitachi High-Technologies CorporationInventors: Yasuhiro Gunji, Hiroshi Miyai, Shigeya Tanaka
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Publication number: 20080285841Abstract: An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.Type: ApplicationFiled: July 10, 2008Publication date: November 20, 2008Inventors: Michio NAKANO, Shigeya Tanaka, Yoshiyuki Momiyama, Takashi Hiroi, Kazuya Hayashi, Dai Fujii, Takako Fujisawa, Atsushi Ichige, Ichiro Kawashima
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Patent number: 7424598Abstract: The data processor for executing, instructions realized by wired logic, by a pipeline system, includes a plurality of instruction registers, and arithmetic operation units of the same number. A plurality of instructions read in the instruction registers in one machine cycle at a time are processed in parallel by the plurality of arithmetic operation units.Type: GrantFiled: May 14, 2001Date of Patent: September 9, 2008Assignee: Renesas Technology Corp.Inventors: Takashi Hotta, Shigeya Tanaka, Hideo Maejima
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Patent number: 7421110Abstract: An image processing apparatus for wafer inspection tool that is able to perform continuously cell to cell comparison inspection, die to die comparison inspection, and cell-to-cell and die-to-die hybrid comparison inspection, employing a plurality of processors. This image processing apparatus for wafer inspection tool comprises a plurality of processors for performing parallel processing, means for cutting out image data including a forward end overlap and a rear end overlap at partition boundaries in order to cut serial data into a predetermined image size, means for distributing the cutout image data to the plurality of processors, and means for assembling results of processing performed by the plurality of processors. The forward end overlap is set greater than a pitch of the cell subject to cell to cell comparison inspection.Type: GrantFiled: February 19, 2004Date of Patent: September 2, 2008Assignee: Hitachi High-Technologies CorporationInventors: Michio Nakano, Shigeya Tanaka, Yoshiyuki Momiyama, Takashi Hiroi, Kazuya Hayashi, Dai Fujii, Takako Fujisawa, Atsushi Ichige, Ichiro Kawashima
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Publication number: 20070233959Abstract: A data processor has a first cache memory with a large capacity and one port and a second cache memory with a small capacity and two ports disposed between a main memory and an instruction processing section. Data which is frequently used is stored in the first cache memory and data which is less frequently used is stored in the second cache memory under control of a controller responsive to prefetch instructions. One of the cache memories may be a set associative cache memory composed of a plurality of memory chips each having at least two memory banks and an output part to gain access to data sets consecutively and one at a time within the memory banks. On the basis of an address sent from the instruction processing section, a memory bank is selected, and a data set from the selected memory bank is supplied to the processing section.Type: ApplicationFiled: May 29, 2007Publication date: October 4, 2007Inventors: Takashi Hotta, Toshihiko Kurihara, Shigeya Tanaka, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito, Kotaro Shimamura
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Publication number: 20070194229Abstract: The present invention provides a mirror electron projection (MPJ) type (SEPJ type included) scanning electron beam apparatus that is capable of performing condition setup, and a method and apparatus for inspecting pattern defects with the scanning electron beam apparatus. A mirror electron projection type defect inspection apparatus, which comprises a charging device for emitting a charging electron beam, electron beam irradiation means for shedding a mirror electron projection electron beam onto an inspection region near which an electrical potential distribution is formed, detection means for detecting secondary electrons or reflected electrons generated from a surface and proximity of the specimen, and defect detection means for detecting a defect by processing a mirror image signal that is detected by the detection means, includes irradiation condition optimization means for optimizing charging electron beam irradiation conditions.Type: ApplicationFiled: November 20, 2006Publication date: August 23, 2007Inventors: Hirohito Okuda, Takashi Hiroi, Masaki Hasegawa, Shigeya Tanaka
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Patent number: 7240159Abstract: A data processor has a first cache memory with a large capacity and one port and a second cache memory with a small capacity and two ports disposed between a main memory and an instruction processing section. Data which is frequently used is stored in the first cache memory and data which is less frequently used is stored in the second cache memory under control of a controller responsive to prefetch instructions. One of the cache memories may be a set associative cache memory composed of a plurality of memory chips each having at least two memory banks and an output part to gain access to data sets consecutively and one at a time within the memory banks. On the basis of an address sent from the instruction processing section, a memory bank is selected, and a data set from the selected memory bank is supplied to the processing section.Type: GrantFiled: December 20, 2004Date of Patent: July 3, 2007Assignee: Hitachi, Ltd.Inventors: Takashi Hotta, Toshihiko Kurihara, Shigeya Tanaka, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito, Kotaro Shimamura
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Publication number: 20060251318Abstract: A visual inspection apparatus and method using the scanning electron microscope are disclosed. An electron beam is scanned repeatedly on a sample, and an inspection and a reference image are generated by the secondary electrons generated from the sample or reflected electrons. From the differential image between the inspection image and the reference image, a defect is determined. The number of pixels in the generated image along the direction of repetitive scanning by the electron beam can be changed.Type: ApplicationFiled: April 20, 2006Publication date: November 9, 2006Applicant: Hitachi High-Technologies CorporationInventors: Yasuhiro GUNJI, Hiroshi MIYAI, Shigeya TANAKA
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Patent number: 7111187Abstract: An information processing system having an original clock oscillator for delivering at least one original clock signal K defined as a first clock signal and a plurality of information processing units supplied with the original clock signal K, wherein each information processing unit comprises clock generating means for generating at least one second clock signal K1 which is phase-locked with the original clock signal K and which has a predetermined duty cycle and a logic device whose operation timing is controlled by the second clock signal K1 and the operation timing of an interface provided between at least one pair of logic devices is synchronously controlled by the clock signal K1.Type: GrantFiled: November 6, 2003Date of Patent: September 19, 2006Assignee: Hitachi, Ltd.Inventors: Takashi Hotta, Kozaburo Kurita, Masahiro Iwamura, Hideo Maejima, Shigeya Tanaka, Tadaaki Bandoh, Yasuhiro Nakatsuka, Kazuo Kato, Sin-ichi Sinoda
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Publication number: 20050102472Abstract: A data processor has a first cache memory with a large capacity and one port and a second cache memory with a small capacity and two ports disposed between a main memory and an instruction processing section. Data which is frequently used is stored in the first cache memory and data which is less frequently used is stored in the second cache memory under control of a controller responsive to prefetch instructions. One of the cache memories may be a set associative cache memory composed of a plurality of memory chips each having at least two memory banks and an output part to gain access to data sets consecutively and one at a time within the memory banks. On the basis of an address sent from the instruction processing section, a memory bank is selected, and a data set from the selected memory bank is supplied to the processing section.Type: ApplicationFiled: December 20, 2004Publication date: May 12, 2005Inventors: Takashi Hotta, Toshihiko Kurihara, Shigeya Tanaka, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito, Kotaro Shimamura
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Patent number: 6848027Abstract: A data processor has a first cache memory with a large capacity and one port and a second cache memory with a small capacity and two ports disposed between a main memory and an instruction processing section. Data which is frequently used is stored in the first cache memory and data which is less frequently used is stored in the second cache memory under control of a controller responsive to prefetch instructions. One of the cache memories may be a set associative cache memory composed of a plurality of memory chips each having at least two memory banks and an output part to gain access to data sets consecutively and one at a time within the memory banks. On the basis of an address sent from the instruction processing section, a memory bank is selected, and a data set from the selected memory bank is supplied to the processing section.Type: GrantFiled: May 1, 2003Date of Patent: January 25, 2005Assignee: Hitachi, Ltd.Inventors: Takashi Hotta, Toshihiko Kurihara, Shigeya Tanaka, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito, Kotaro Shimamura