Patents by Inventor Shigeyuki Okumura
Shigeyuki Okumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8154204Abstract: A plasma display panel includes a front plate having a dielectric layer covering a display electrode formed on a substrate and a protective layer formed on the dielectric layer, and a rear plate facing the front plate so as to form a discharge space. The plasma display panel also includes an address electrode in a direction crossing the display electrode, barrier ribs for partitioning the discharge space, and phosphor layers. The protective layer is constructed by forming a ground film on the dielectric layer and adhering agglomerated particles to the ground film. The agglomerated particles are produced by coagulating a plurality of crystal particles made of metal oxide.Type: GrantFiled: April 20, 2009Date of Patent: April 10, 2012Assignee: Panasonic CorporationInventors: Kaname Mizokami, Hiroshi Sogou, Shigeyuki Okumura
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Patent number: 8022628Abstract: A plasma display panel has a front substrate including a plurality of display electrode pairs, a dielectric layer, and a protective layer, and a rear substrate including a plurality of data electrodes, a barrier rib, and a phosphor layer. The front substrate and rear substrate face each other so that the display electrode pairs and the data electrodes intersect, and a hydrogen-absorbing material containing palladium is disposed inside the plasma display panel.Type: GrantFiled: November 5, 2008Date of Patent: September 20, 2011Assignee: Panasonic CorporationInventors: Hiroshi Sogou, Shigeyuki Okumura
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Publication number: 20110204775Abstract: The plasma display panel has a front plate that has a dielectric layer for covering a display electrode formed on a substrate and a protective layer formed on the dielectric layer, and a rear plate that is faced to the front plate so as to form discharge space, and has an address electrode in the direction crossing the display electrode, barrier ribs for partitioning the discharge space, and phosphor layers. The protective layer is formed by forming a ground film on the dielectric layer and sticking a agglomerated particle to the ground film. Here, the agglomerated particle is produced by coagulating a plurality of crystal particles made of metal oxide.Type: ApplicationFiled: April 20, 2009Publication date: August 25, 2011Inventors: Kaname Mizokami, Hiroshi Sogou, Shigeyuki Okumura
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Publication number: 20100176710Abstract: A plasma display panel has a front substrate including a plurality of display electrode pairs, a dielectric layer, and a protective layer, and a rear substrate including a plurality of data electrodes, a barrier rib, and a phosphor layer. The front substrate and rear substrate are faced to each other so that the display electrode pairs and the data electrodes intersect, and a hydrogen-absorbing material containing palladium inside is disposed.Type: ApplicationFiled: November 5, 2008Publication date: July 15, 2010Inventors: Hiroshi Sogou, Shigeyuki Okumura
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Patent number: 7432880Abstract: A method of driving a plasma display panel having display electrode pairs each one of which pairs is formed of a scan electrode and a sustain electrode. A priming electrode is placed in every other spaces between the display electrode pairs and in parallel with the display electrode pairs. An addressing period includes an odd-line addressing period in which an address operation is conducted to primary discharge cells having odd-number scan electrodes, an even-line addressing period in which an address operation is conducted to primary discharge cells having even-number scan electrodes. During the respective addressing periods, scan pulse voltage Va is applied to odd-number scan electrodes or even-number scan electrodes while priming pulse voltage Vp is applied, prior to the application of the scan pulse voltage, to a priming electrode adjacent to the scan electrode to which scan pulse voltage Va is to be applied, in order to generate a priming discharge between the priming electrodes and the data electrodes.Type: GrantFiled: September 14, 2005Date of Patent: October 7, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroyuki Tachibana, Naoki Kosugi, Toshikazu Wakabayashi, Shigeyuki Okumura
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Publication number: 20070222706Abstract: A method of driving a plasma display panel having display electrode pairs each one of which pairs is formed of a scan electrode and a sustain electrode. A priming electrode is placed in every other spaces between the display electrode pairs and in parallel with the display electrode pairs. An addressing period includes an odd-line addressing period in which an address operation is conducted to primary discharge cells having odd-number scan electrodes, an even-line addressing period in which an address operation is conducted to primary discharge cells having even-number scan electrodes. During the respective addressing periods, scan pulse voltage Va is applied to odd-number scan electrodes or even-number scan electrodes while priming pulse voltage Vp is applied, prior to the application of the scan pulse voltage, to a priming electrode adjacent to the scan electrode to which scan pulse voltage Va is to be applied, in order to generate a priming discharge between the priming electrodes and the data electrodes.Type: ApplicationFiled: September 14, 2005Publication date: September 27, 2007Inventors: Hiroyuki Tachibana, Naoki Kosugi, Toshikazu Wakabayashi, Shigeyuki Okumura
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Patent number: 7145582Abstract: A method of driving a plasma display device that includes a plurality of scanning electrodes, a plurality of sustaining electrodes, and a plurality of data electrodes is such that, when m is any given integer, the data electrodes are applied with a negative polarity pulse when a voltage applied to the scanning electrodes gradually decreases during the initialization period, if a final pulse in a sustain period of an (m?1)-th subfield is applied to the scanning electrodes and an m-th subfield includes an initialization period. If the final pulse in the sustain period of the (m?1)-th subfield is applied to the sustaining electrodes and the m-th subfield includes the initialization period, the data electrodes are applied with a positive polarity pulse when a voltage applied to the scanning electrodes gradually increases during the initialization period.Type: GrantFiled: January 22, 2002Date of Patent: December 5, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Katutoshi Shindo, Shigeyuki Okumura, Takatsugu Kurata, Nobuaki Nagao, Ryuichi Murai
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Patent number: 7138966Abstract: The present invention provides a plasma display device for displaying a high quality image, and its driving method, with which the production cost and power consumption may be reduced and write errors may be suppressed. In the driving method, the length of the erase period D2 is T0+160 ?sec, based on the number of sustain pulses being greater than or equal to 25 and less than 50 in the discharge sustain period C2. The length is set by a T1 setting unit according to the information on the number of the sustain pulses sent from a preprocessor in a driving unit, and a T1 table stored in a T1 table storage unit. The T1 setting unit sets T1=160 ?sec referring to an extension time period T1 corresponding to the number of sustain pulses that is greater than or equal to 25 and less than 50 in the T1 table.Type: GrantFiled: June 11, 2002Date of Patent: November 21, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Katsutoshi Shindo, Kenji Ogawa, Shigeyuki Okumura, Takatsugu Kurata
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Publication number: 20040233134Abstract: The present invention provides a plasma display device for displaying a high quality image, and its driving method, with which the production cost and power consumption may be reduced and write errors may be suppressed. In the driving method, the length of the erase period D2 is T0+160 &mgr;sec, based on the number of sustain pulses being greater than or equal to 25 and less than 50 in the discharge sustain period C2. The length is set by a T1 setting unit according to the information on the number of the sustain pulses sent from a preprocessor in a driving unit, and a T1 table stored in a T1 table storage unit. The T1 setting unit sets T1=160 &mgr;sec referring to an extension time period T1 corresponding to the number of sustain pulses that is greater than or equal to 25 and less than 50 in the T1 table.Type: ApplicationFiled: June 4, 2004Publication date: November 25, 2004Inventors: Katsutoshi Shindo, Kenji Ogawa, Shigeyuki Okumura, Takatsugu Kurata
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Publication number: 20040196216Abstract: A method of driving a plasma display device that includes a plurality of scanning electrodes, a plurality of sustaining electrodes, and a plurality of data electrodes is such that, when m is any given integer, the data electrodes are applied with a negative polarity pulse when a voltage applied to the scanning electrodes gradually decreases during the initialization period, if a final pulse in a sustain period of an (m−1)-th subfield is applied to the scanning electrodes and an m-th subfield includes an initialization period. If the final pulse in the sustain period of the (m−1)-th subfield is applied to the sustaining electrodes and the m-th subfield includes the initialization period, the data electrodes are applied with a positive polarity pulse when a voltage applied to the scanning electrodes gradually increases during the initialization period.Type: ApplicationFiled: May 20, 2004Publication date: October 7, 2004Inventors: Katutoshi Shindo, Shigeyuki Okumura, Takatsugu Kurata, Nobuaki Nagao, Ryuichi Murai
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Patent number: 6753645Abstract: A plasma display panel comprising plural kinds of phosphor layers emitting different colors of fluorescent light, at least one kind of the phosphor layer being formed of a mixed phosphor obtained by mixing a phosphor having a surface potential with a negative polarity and a phosphor having a surface potential with a positive polarity. By using the mixed phosphor, the negative polarity of the surface potential is changed to the positive polarity, thereby reducing the discharge error and discharge variation, and improving the quality of display.Type: GrantFiled: December 8, 2000Date of Patent: June 22, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Haruki, Utaro Miyagawa, Shigeyuki Okumura
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Patent number: 6603447Abstract: A method of driving an AC plasma display panel is provided, in which plural pairs of a scanning electrode and a sustain electrode covered with a dielectric layer and a plurality of data electrodes are arranged orthogonal to and opposing each other with a discharge space being sandwiched therebetween. The method includes an initialization period for applying, to the scanning electrode, an initialization waveform of a ramp voltage and a write period for applying, to the scanning electrode, a scanning waveform with a polarity opposite to that of the initialization waveform sequentially and at the same time applying, to the selected data electrodes, a data waveform with the same polarity as that of the initialization waveform. The potential of the scanning electrode to which the scanning waveform is being applied is set to be lower than that of the scanning electrode at the end of the application of the initialization waveform.Type: GrantFiled: April 11, 2000Date of Patent: August 5, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yukiharu Ito, Shigeyuki Okumura
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Publication number: 20010003410Abstract: A plasma display panel comprising plural kinds of phosphor layers emitting different colors of fluorescent light, at least one kind of the phosphor layer being formed of a mixed phosphor obtained by mixing a phosphor having a surface potential with a negative polarity and a phosphor having a surface potential with a positive polarity. By using the mixed phosphor, the negative polarity of the surface potential is changed to the positive polarity, thereby reducing the discharge error and discharge variation, and improving the quality of display.Type: ApplicationFiled: December 8, 2000Publication date: June 14, 2001Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Haruki, Utaro Miyagawa, Shigeyuki Okumura
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Patent number: 6100606Abstract: A miniaturized high frequency switching device is capable of giving an optimum over-all impedance over the length of a signal path while compensating for inevitable impedance variation seen in a particular segment of the signal path. The switching device includes a contact block having fixed contacts and a movable contact. The fixed contacts and the movable contact are surrounded by an electromagnetic shield which is supported on a conductor base to be grounded therethrough for isolating the current path from a surrounding electromagnetic field. The fixed contacts are formed respectively on one ends of terminal pins provided for electrical connection to an external load circuit operating on high frequency signals. The terminal pin extends through an insulation ring fitted in the conductor base so as to be electrically insulated therefrom and form the signal path flowing a high frequency current.Type: GrantFiled: January 6, 1999Date of Patent: August 8, 2000Assignee: Matsushita Electric Works, Ltd.Inventors: Atsushi Nakahata, Shigeyuki Okumura, Tomohiro Taguchi
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Patent number: 4740771Abstract: An electromagnetic relay includes an electromagnet block and an armature block both mounted together on a relay base. The armature block is magnetically coupled to the electromagnet block such that it is magnetically driven thereby to move linearly between two operating positions for actuating the contact assembly into open and closed contact conditions. The armature block is supported on the base by means of a U-shaped balancing spring with a pair of parallel spring arms in the form of a spring leaf and a web integrally bridging the parallel spring arms at one end of each arm.Type: GrantFiled: July 30, 1987Date of Patent: April 26, 1988Assignee: Matsushita Electric Works, Ltd.Inventors: Masanori Motoyama, Atsushi Nakahata, Nobuo Kobayashi, Shigeyuki Okumura